MC68MH360ZP33L Freescale Semiconductor, MC68MH360ZP33L Datasheet - Page 682

IC MPU 32BIT QUICC 357-PBGA

MC68MH360ZP33L

Manufacturer Part Number
MC68MH360ZP33L
Description
IC MPU 32BIT QUICC 357-PBGA
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MC68MH360ZP33L

Processor Type
M683xx 32-Bit
Speed
33MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
357-PBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-

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Parallel I/O Ports
(PAPAR) bit is cleared. Each pin is configured as a dedicated on-chip peripheral pin if the
corresponding PAPAR bit is set.
When the port a pin is configured as a general-purpose I/O pin, the signal direction for that
pin is determined by the corresponding control bit in the port A data direction register
(PADIR). The port A I/O pin is configured as an input if the corresponding PADIR bit is
cleared; it is configured as an output if the corresponding PADIR bit is set. All PAPAR bits
and PADIR bits are cleared on total system reset, configuring all port A pins as general-pur-
pose input pins.
If a port A pin is selected as a general-purpose I/O pin, it may be accessed through the port
A data register (PADAT). Data written to the PADAT is stored in an output latch. If a port A
pin is configured as an output, the output latch data is gated onto the port pin. In this case,
when PADAT is read, the port pin itself is read. If a port A pin is configured as an input, data
written to PADAT is still stored in the output latch but is prevented from reaching the port
pin. In this case, when PADAT is read, the state of the port pin is read.
If an input to a peripheral is not supplied from a pin, then a default value is supplied to the
on-chip peripheral as listed in Table 7-19.
7-358
NOTES:
1: Only available on REV C mask or later. NOT Available on REV A or B. And when PA6 or PA7 is not used as
TXD4 or RXD4 functions
Rev A mask is C63T
Rev B mask are C69T, and F35G
Current Rev C mask are E63C, E68C and F15W
Signal
PA10
PA11
PA12
PA13
PA14
PA15
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9
PAPAR = 0
PORT A10
PORT A11
PORT A12
PORT A13
PORT A14
PORT A15
PORT A0
PORT A1
PORT A2
PORT A3
PORT A4
PORT A5
PORT A6
PORT A7
PORT A8
PORT A9
Freescale Semiconductor, Inc.
Table 7-19. Port A Pin Assignment
For More Information On This Product,
CLK1/TIN1/L1RCLKA
CLK3/TIN2/L1TCLKA
CLK6/L1RCLKB
CLK8/L1TCLKB
CLK5/TIN3
CLK7/TIN4
PADIR = 0
MC68360 USER’S MANUAL
RXD1
RXD2
RXD3
RXD4
TXD1
TXD2
TXD3
TXD4
CLK2
CLK4
Go to: www.freescale.com
PAPAR = 1
Pin Function
PADIR = 1
L1TXDB
L1RXDB
L1TXDA
L1RXDA
BRGO1
BRGO2
BRGO3
BRGO4
TOUT1
TOUT2
TOUT3
TOUT4
RXD4
TXD4
1
1
CLK1/TIN1/L1RCLKA = BRGO1
CLK3/TIN2/L1TCLKA = BRGO2
CLK6/L1RCLKB = GND
CLK8/L1TCLKB = GND
CLK5/TIN3 = BRGO3
CLK7/TIN4 = BRGO4
Input to On-Chip
L1RXDA = GND
CLK4 = CLK8
CLK2 = GND
Peripherals
Undefined
Undefined
GND
GND
GND
MOTOROLA

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