IDT82V2108PXG8 IDT, Integrated Device Technology Inc, IDT82V2108PXG8 Datasheet - Page 28

IC FRAMER T1/J1/E1 8CH 128-PQFP

IDT82V2108PXG8

Manufacturer Part Number
IDT82V2108PXG8
Description
IC FRAMER T1/J1/E1 8CH 128-PQFP
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of IDT82V2108PXG8

Controller Type
T1/E1/J1 Framer
Interface
Parallel
Voltage - Supply
2.97 V ~ 3.63 V
Current - Supply
160mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
128-MQFP, 128-PQFP
Screening Level
Industrial
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
82V2108PXG8

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IDT82V2108PXG8
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
IDT82V2108
3.2.2
ment patterns in standard Super-Frame (SF) or in Extended Super-
Frame (ESF) framing formats. The format is chosen by the ESF (b4, T1/
J1-020H). The searching algorithm of T1 or J1 is determined by the
JYEL (b3, T1/J1-020H). The Frame Processor acquires frame alignment
per ITU-T requirement.
ues to monitor the received data stream. The Frame Processor declares
the framing bit errors and bit error events, if any. The Frame Processor
can also detect out-of-frame events based on selectable criteria.
data.
3.2.2.1
the UNF (b6, T1/J1-000H) is logic 0.
3.2.2.1.1
made up of 12 frames. Each frame consists of a one-bit overhead - F Bit
and 24 8-bit channels. If two consecutive valid Frame Alignment Pat-
terns - ‘100011011100’ for T1 or ‘10001101110X’ for J1 - are received in
the F-Bit in the received data stream, the SF synchronization is
acquired. The same pattern is a mimic pattern if it is received in the data
stream other than F-bit. If a mimic pattern exists during the frame
searching procedure, the synchronization will not be declared and the
MFP (b1, T1/J1-022H) will be set to indicate the presence of a mimic
pattern.
Table 3: SF Format
Functional Description
Note:
* ‘X’ should be logic 0 in T1 FAS.
bit.
Frame No. in SF
‘X’ can be logic 0 or 1 in J1 FAS because this position is used as Yellow Alarm Indication
In T1/J1 Mode, the Frame Processor searches for the frame align-
When frame alignment is achieved, the Framer Processor contin-
The Frame Processor can also be disabled to receive unframed
All the frame synchronization function can only be executed when
The structure of T1/J1 SF format is illustrated in Table 3. The SF is
10
12
11
1
2
3
4
5
6
7
8
9
T1/J1 MODE
Synchronization Searching
Super Frame (SF) Format
(Frame Alignment)
F-Bit
X*
1
0
0
0
1
1
0
1
1
1
0
Data Bit
the Bit in Each Channel
1 - 8
1 - 8
1 - 8
1 - 8
1 - 8
1 - 7
1 - 8
1 - 8
1 - 8
1 - 8
1 - 8
1 - 7
Signaling Bit
A (bit 8)
B (bit 8)
-
-
-
-
-
-
-
-
-
-
18
3.2.2.1.2
is made up of 24 frames. Each frame consists of a one-bit overhead - F
Bit and 24 8-bit channels.
located from Frame 4 in every 4th F-bit position.
zation is acquired if four consecutive Frame Alignment Patterns are
detected in the F-Bit in the received data stream. The same pattern is a
mimic pattern if it is received in the data stream other than F-bit. If a
mimic pattern exists during the frame searching procedure, the synchro-
nization will not be declared and the MFP (b1, T1/J1-022H) will be set to
indicate the presence of a mimic pattern.
will be declared when 6 consecutive Frame Alignment Patterns are
received error free and the CRC-6 checksum is also error free. In this
condition, the existence of mimic patterns will not be considered.
Table 4: ESF Format
Frame No.
in ESF
The structure of T1/J1 ESF format is illustrated in Table 4. The ESF
The pattern of the Frame Alignment Pattern is ‘001011’, which is
When the ESFFA (b5, T1/J1-020H) is set to ‘0’, the ESF synchroni-
When the ESFFA (b5, T1/J1-020H) is set to ‘1’, the synchronization
10
12
13
14
15
16
17
18
19
20
21
22
23
24
11
1
2
3
4
5
6
7
8
9
Extended Super Frame (ESF) Format
FAS
0
0
1
0
1
1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
F-Bit Assignment
DL
DL
DL
DL
DL
DL
DL
DL
DL
DL
DL
DL
DL
-
-
-
-
-
-
-
-
-
-
-
-
CRC
C1
C2
C3
C4
C5
C6
T1 / E1 / J1 OCTAL FRAMER
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
the Bit in Each Channel
Data Bit
1 - 8
1 - 8
1 - 8
1 - 8
1 - 8
1 - 7
1 - 8
1 - 8
1 - 8
1 - 8
1 - 8
1 - 7
1 - 8
1 - 8
1 - 8
1 - 8
1 - 8
1 - 7
1 - 8
1 - 8
1 - 8
1 - 8
1 - 8
1 - 7
March 5, 2009
Signaling Bit
C (bit 8)
D (bit 8)
A (bit 8)
B (bit 8)
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-

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