SAF1761BE/V1,557 NXP Semiconductors, SAF1761BE/V1,557 Datasheet - Page 40

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SAF1761BE/V1,557

Manufacturer Part Number
SAF1761BE/V1,557
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SAF1761BE/V1,557

Lead Free Status / Rohs Status
Compliant

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Part Number:
SAF1761BE/V1,557
Manufacturer:
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Quantity:
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NXP Semiconductors
Table 24.
[1]
[2]
Table 25.
Table 26.
Table 27.
SAF1761_1
Product data sheet
Bit
2
1
0
Bit
31 to 0
Bit
31 to 0
Bit
31 to 0
For details on register bit description, refer to
These fields read logic 0, if the PP (Port Power) bit in register PORTSC1 is logic 0.
Symbol
ISO_PTD_DONE_
MAP[31:0]
Symbol
ISO_PTD_SKIP_
MAP[31:0]
Symbol
ISO_PTD_LAST_
PTD[31:0]
Symbol
PED
ECSC
ECCS
PORTSC1 - Port Status and Control 1 register (address 0064h) bit description
ISO PTD Done Map register (address 0130h) bit description
ISO PTD Skip Map register (address 0134h) bit description
ISO PTD Last PTD register (address 0138h) bit description
8.2.7 ISO PTD Done Map register
8.2.8 ISO PTD Skip Map register
8.2.9 ISO PTD Last PTD register
The bit description of the register is given in
This register represents a direct map of the done status of the 32 PTDs. The bit
corresponding to a certain PTD will be set to logic 1 as soon as that PTD execution is
completed. Reading the Done Map register will clear all the bits that are set to logic 1, and
the next reading will reflect the updated status of new executed PTDs.
Table 26
When a bit in the PTD Skip Map is set to logic 1, the corresponding PTD will be skipped,
independent of the V bit setting. The information in that PTD is not processed. For
example, NextPTDPointer will not affect the order of processing of PTDs. The Skip bit
should not normally be set on the position indicated by NextPTDPointer.
Table 27
Once the LastPTD bit corresponding to a PTD is set, this will be the last PTD processed
(checking V = logic 1) in that PTD category. Subsequently, the process will restart with the
first PTD of that group. This is useful to reduce the time in which all the PTDs, the
Description
Port Enabled/Disabled: Logic 1 means enable. Logic 0 means disable.
Connect Status Change: Logic 1 means change in ECCS. Logic 0 means no change.
Current Connect Status: Logic 1 indicates a device is present on the port. Logic 0 indicates
no device is present.
Access
R/W
Access
R/W
Access
R
shows the bit description of the register.
shows the bit description of the ISO PTD Last PTD register.
Value
0000 0000h ISO PTD Done Map: Done map for each of the 32 PTDs for the ISO
[1]
Value
FFFF FFFFh
Value
0000 0000h
Ref. 2 “Enhanced Host Controller Interface Specification for Universal Serial Bus Rev.
Rev. 01 — 18 November 2009
[2]
Description
transfer
Description
ISO PTD last PTD: Last PTD of the 32 PTDs is indicated by the
32 bitmap.
1h — One PTD in ISO
2h — Two PTDs in ISO
4h — Three PTDs in ISO
Description
ISO PTD Skip Map: Skip map for each of the 32 PTDs for the
ISO transfer
Table
25.
Hi-Speed USB OTG controller
…continued
[2]
SAF1761
© NXP B.V. 2009. All rights reserved.
40 of 166
[2]
1.0”.

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