SAF1761BE/V1,557 NXP Semiconductors, SAF1761BE/V1,557 Datasheet - Page 96

• Manufacturer Part Number: SAF1761BE/V1,557
• Manufacturer: NXP Semiconductors

Specifications of SAF1761BE/V1,557

• Lead Free Status / Rohs Status: Compliant

NXP Semiconductors
Table 91.
Table 92.
[1]
Table 93.
SAF1761_1
Product data sheet
Bit
4
3
2
1
0
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
15 to 10
9
8
7
6
5
4
3
2
1
0
The reserved bits should always be written with the reset value.
Symbol
RMT_CONN
ID
-
A_B_SESS_VLD
VBUS_VLD
Symbol
-
OTG_TMR_TIMEOUT
B_SE0_SRP
B_SESS_END
BDIS_ACON
OTG_RESUME
RMT_CONN
ID
DP_SRP
A_B_SESS_VLD
VBUS_VLD
OTG Interrupt Enable Fall register (address set: 0380h, clear: 0382h) bit description
OTG Interrupt Enable Rise register (address set: 0384h, clear: 0386h) bit allocation
OTG Interrupt Enable Rise register (address set: 0384h, clear: 0386h) bit description
9.5.3.4 OTG Interrupt Enable Rise register
B_SESS_
R/S/C
R/S/C
END
15
0
7
0
This register (see
LOW-to-HIGH.
BDIS_
ACON
R/S/C
R/S/C
Description
IRQ asserted on RMT_CONN removal
IRQ asserted on the ID pin transition from HIGH to LOW
reserved
IRQ asserted on removing A-session valid for the A-device or B-session valid for the
B-device condition
IRQ asserted on the falling edge of V
14
0
6
0
Description
reserved
IRQ asserted on OTG timer time-out
IRQ asserted when at least 2 ms of SE0 is detected in the B-idle state
IRQ asserted when V
IRQ asserted on BDIS_ACON condition
IRQ asserted on J-K resume
IRQ asserted on RMT_CONN
IRQ asserted on the ID pin transition from LOW to HIGH
IRQ asserted when DP is asserted during SRP
IRQ asserted on the A-session valid for the A-device or on the B-session valid for the
B-device
IRQ asserted on the rising edge of V
RESUME
R/S/C
OTG_
R/S/C
Table 92
13
0
5
0
Rev. 01 — 18 November 2009
reserved
for bit allocation) enables interrupts on transition from
[1]
BUS
CONN
RMT_
R/S/C
R/S/C
12
0
4
0
is less than 0.8 V
BUS
R/S/C
R/S/C
BUS
11
ID
0
3
0
DP_SRP
R/S/C
R/S/C
10
0
2
0
Hi-Speed USB OTG controller
OTG_TMR_
A_B_SESS
TIMEOUT
R/S/C
R/S/C
_VLD
…continued
9
0
1
0
SAF1761
© NXP B.V. 2009. All rights reserved.
VBUS_VLD
B_SE0_
R/S/C
R/S/C
SRP
96 of 166
8
0
0
0