CY8CKIT-050 Cypress Semiconductor Corp, CY8CKIT-050 Datasheet - Page 47

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CY8CKIT-050

Manufacturer Part Number
CY8CKIT-050
Description
DEV KIT PSOC 5 CY8C55
Manufacturer
Cypress Semiconductor Corp
Series
PSoC®5r
Type
MCUr
Datasheet

Specifications of CY8CKIT-050

Design Resources
PSoC 5 Dev Kit Schematic CY8CKIT-050 PCBA BOM CY8CKIT-50 Gerber File
Contents
Board, Cable, CD, Display, Documentation
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
CY8C55
Other names
428-3110
Analog local buses (abus) are routing resources located within
the analog subsystem and are used to route signals between
different analog blocks. There are eight abus routes in CY8C38,
four in the left half (abusl [0:3]) and four in the right half (abusr
[0:3]) as shown in
globals and analog mux buses from being used for
interconnecting the analog blocks.
Document Number: 001-66235 Rev. *A
Figure
Switch Group
Connection
Small ( ~870 Ohms )
Mux Group
Vddio2
Large ( ~200 Ohms)
P15[4]
P15[5]
GPIO
P0[4]
GPIO
P0[5]
GPIO
P0[6]
GPIO
P0[7]
GPIO
P4[2]
GPIO
P4[3]
GPIO
P4[4]
GPIO
P4[5]
GPIO
P4[6]
GPIO
P4[7]
Vddd
GPIO
P6[0]
GPIO
P6[1]
GPIO
P6[2]
GPIO
P6[3]
GPIO
GPIO
GPIO
P2[0]
GPIO
P2[1]
GPIO
P2[2]
GPIO
P2[3]
GPIO
P2[4]
Vccd
Vssd
Switch Resistance
8-2. Using the abus saves the analog
*
*
*
*
*
*
*
*
swinp
swinn
ExVrefL1
ExVrefL
i0
i2
dsm0_qtz_vref1 (1.024V)
*
dsm0_vcm_vref2 (0.7V)
dsm0_qtz_vref2 (1.2V)
dsm0_vcm_vref1
dac_vref (0.256V)
Vdda/4
vpwra/2
*
SAR_vref1 (1.024V)
Vdda/2
Vdda
refbuf_vref1 (1.024V)
en_resvpwra
vpwra
Vdda
SAR_vref2 (1.2V)
cmp0_vref
bg_vda_res_en
refbuf_vref2 (1.2V)
(1.024V)
(0.8V)
en_resvda
swinn
cmp_muxvn[1:0]
*
vref_cmp1
opamp0
abuf_vref_int
(0.256V)
Vdda/2
swfol
(1.024V)
vcmsel[1:0]
Vdda
:
*
en_resvda
sc0_bgref
sc1_bgref
(1.024V)
(1.024V)
swinp
*
refsel[1:0]
Figure 8-2. CY8C55 Analog Interconnect
*
AMUXBUSL
refmux[2:0]
cmp1_vref
vssa
PRELIMINARY
refmux[2:0]
vssa
opamp2
swfol
*
ADC
TS
swout
*
0
0
1
GLOBALS
1
ANALOG
2
2
3
3
Vss ref
VBE
4
4
ExVrefL2
5
5
6
6
bg_vda_swabusl0
7
7
ANALOG
swin
*
0123
0123
BUS
*
LPF
ABUSL0
ABUSL1
ABUSL2
ABUSL3
in0
v0
i0
v2
i2
+
Vp (+)
Vn (-)
out0
+
+
-
vcm
vref_vss_ext
-
-
Vin
Vref
out
Vin
Vref
out
refs
*
out
sc0
sc2
Vrefhi_out
ref
in
DSM0
qtz_ref
COMPARATOR
DAC0
DAC2
ExVrefL1
AMUXBUSL
comp2
comp0
CAPSENSE
SAR ADC
refbufl
ExVrefL
SAR0
*
*
AMUXBUSL
AGL[3]
AGL[2]
AGL[1]
AGL[0]
VIDAC
AGL[6]
AGL[7]
AGL[4]
AGL[5]
SC/CT
refs
Multiplexers and switches exist on the various buses to direct
signals into and out of the analog blocks. A multiplexer can have
only one connection on at a time, whereas a switch can have
multiple connections on simultaneously. In
multiplexers are indicated by grayed ovals and switches are
indicated by transparent ovals.
LPF
DSM
CY8C55 only
*
*
104
36
5
28
90
PSoC
SAR1
13
ExVrefR
ExVrefL2
refbufr
Vrefhi_out
*
comp1
comp3
AMUXBUSR
DAC1
DAC3
ABUSR0
ABUSR1
ABUSR2
ABUSR3
44
AGR[3]
AGR[2]
AGR[1]
AGR[0]
(+) Vp
(-) Vn
Vref
Vref
refs
sc1
Vin
Vin
sc3
*
out1
out
ref
out
out
in1
in
AMUXBUSR
AGR[5]
AGR[6]
AGR[7]
v1
v3
AGR[4]
+
+
i1
i3
-
-
ANALOG
3210
3210
®
BUS
swin
*
5: CY8C55 Family Datasheet
Notes:
* Denotes pins on all packages
76543210
76543210
GLOBALS
ANALOG
LCD signals are not shown.
*
*
swout
*
AMUXBUSR
*
Vssa
refmux[2:0]
*
opamp3
swfol
sc3_bgref
(1.024V)
sc2_bgref
(1.024V)
abuf_vref_int
refsel[1:0]
SAR_vref2 (1.2V)
SAR_vref1 (1.024V)
(1.024V)
en_resvda
*
refbuf_vref2 (1.2V)
refbuf_vref1 (1.024V)
cmp0_vref
Vdda
Vdda/2
(1.024V)
*
swfol
opamp1
*
ExVrefR
i3
i1
*
2-April-2010
Rev #51
Figure
swinp
swinn
swinp
swinn
*
*
*
*
*
*
*
*
*
USB IO
USB IO
GPXT
P15[1]
GPXT
P15[0]
P12[7]
P12[6]
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
P15[7]
P15[6]
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
P3[5]
P3[4]
P3[3]
P3[2]
P3[1]
P3[0]
Vddd
P5[7]
P5[6]
P5[5]
P5[4]
P1[7]
P1[6]
Page 47 of 114
Vccd
Vssd
SIO
SIO
8-2,
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