CY8CKIT-050 Cypress Semiconductor Corp, CY8CKIT-050 Datasheet - Page 52

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CY8CKIT-050

Manufacturer Part Number
CY8CKIT-050
Description
DEV KIT PSOC 5 CY8C55
Manufacturer
Cypress Semiconductor Corp
Series
PSoC®5r
Type
MCUr
Datasheet

Specifications of CY8CKIT-050

Design Resources
PSoC 5 Dev Kit Schematic CY8CKIT-050 PCBA BOM CY8CKIT-50 Gerber File
Contents
Board, Cable, CD, Display, Documentation
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
CY8C55
Other names
428-3110
8.6.3 PGA
The PGA amplifies an external or internal signal. The PGA can
be configured to operate in inverting mode or noninverting mode.
The PGA function may be configured for both positive and
negative gains as high as 50 and 49 respectively. The gain is
adjusted by changing the values of R1 and R2 as illustrated in
Figure
configuration and possible resistor settings for the PGA. The
gain is switched from inverting and non inverting by changing the
shared select value of the both the input muxes. The bandwidth
for each gain case is listed in
Table 8-3. Bandwidth
Figure 8-10. PGA Resistor Settings
The PGA is used in applications where the input signal may not
be large enough to achieve the desired resolution in the ADC, or
dynamic range of another SC/CT block such as a mixer. The gain
is adjustable at runtime, including changing the gain of the PGA
prior to each ADC sample.
8.6.4 TIA
The Transimpedance Amplifier (TIA) converts an internal or
external current to an output voltage. The TIA uses an internal
feedback resistor in a continuous time configuration to convert
input current to output voltage. For an input current I
voltage is V
non inverting input. The feedback resistor Rfb is programmable
between 20 KΩ and 1 MΩ through a configuration register.
Table 8-4
configuration settings.
Table 8-4. Feedback Resistor Settings
Document Number: 001-66235 Rev. *A
V
V
S
V
V
Configuration Word
in
ref
ref
in
Gain
8-10. The schematic in
24
48
50
1
0
1
0
1
shows the possible values of Rfb and associated
000b
001b
010b
100b
101b
011b
110b
111b
REF
- I
20 k or 40 k
in
R1
x R
fb
, where V
Bandwidth
6.0 MHz
340 kHz
220 kHz
215 kHz
Table
Figure 8-10
Nominal R
REF
8-3.
R2
is the value placed on the
20 k to 980 k
1000
120
250
500
20
30
40
60
shows the
fb
(KΩ)
PRELIMINARY
in
, the output
Figure 8-11. Continuous Time TIA Schematic
The TIA configuration is used for applications where an external
sensor's output is current as a function of some type of stimulus
such as temperature, light, magnetic flux etc. In a common
application, the voltage DAC output can be connected to the
V
current by adjusting the voltage DAC output voltage.
8.7 LCD Direct Drive
The PSoC Liquid Crystal Display (LCD) driver system is a highly
configurable peripheral designed to allow PSoC to directly drive
a broad range of LCD glass. All voltages are generated on chip,
eliminating the need for external components. With a high
multiplex ratio of up to 1/16, the CY8C55 family LCD driver
system can drive a maximum of 736 segments. The PSoC LCD
driver module was also designed with the conservative power
budget of portable devices in mind, enabling different LCD drive
modes and power down modes to conserve power.
PSoC Creator provides an LCD segment drive component. The
component wizard provides easy and flexible configuration of
LCD resources. You can specify pins for segments and
commons along with other options. The software configures the
device to meet the required specifications. This is possible
because of the programmability inherent to PSoC devices.
Key features of the PSoC LCD segment system are:
REF
LCD panel direct driving
Type A (standard) and Type B (low power) waveform support
Wide operating voltage range support (2 V to 5 V) for LCD
panels
Static, 1/2, 1/3, 1/4, 1/5 bias voltage levels
Internal bias voltage generation through internal resistor ladder
Up to 62 total common and segment outputs
Up to 1/16 multiplex for a maximum of 16 backplane/common
outputs
Up to 62 front plane/segment outputs for direct drive
Drives up to 736 total segments (16 backplane x 46 front plane)
Up to 64 levels of software controlled contrast
Ability to move display data from memory buffer to LCD driver
through DMA (without CPU intervention)
Adjustable LCD refresh rate from 10 Hz to 150 Hz
Ability to invert LCD display for negative image
Three LCD driver drive modes, allowing power optimization
LCD driver configurable to be active when PSoC is in limited
active mode
V ref
PSoC
I in
TIA input to allow calibration of the external sensor bias
®
5: CY8C55 Family Datasheet
R fb
Page 52 of 114
V out
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