ST52T430K3M6 STMicroelectronics, ST52T430K3M6 Datasheet - Page 23

• Manufacturer Part Number: ST52T430K3M6
• Manufacturer: STMicroelectronics

Specifications of ST52T430K3M6

• Cpu Family: ST52
• Device Core Size: 8b
• Frequency (max): 20MHz
• Interface Type: SCI/UART
• Program Memory Type: EPROM
• Program Memory Size: 8KB
• Total Internal Ram Size: 256Byte
• # I/os (max): 23
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5/5.8V
• Operating Supply Voltage (min): 2.7/3V
• On-chip Adc: 8-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 34
• Package Type: SSO
• Lead Free Status / Rohs Status: Not Compliant

3.1.4 EPROM Read/Verify Margin Mode.
The read phase is executed with V
instead of the verify phase that needs V
12V 5%.
The Memory Verify operation is available in order
to verify the accuracy of the data written. A
Memory Verify Margin Mode operation can be
executed immediately after writing each byte, in
this case (see Figure ):
1) a positive pulse on RST_CONF signal resets the
EPROM Control Register, if it wasn’t already reset;
2) one positive pulse on INC_CONF loads the
Memory Read/Verify operation code;
3) a negative pulse (100 ns) on the PHASE signal
validates the Memory Reading / Verify operation;
4) a negative pulse on RST_CONF signal puts in
the PA(0:7) port the value stored in the actual
memory address and resets the EPROM Control
Register;
If an error occurred writing, the user has to repeat
EPROM writing.
3.1.5 Stand by Mode.
EPROM has a standby mode, which reduces the
active current from 10mA (Programming mode) to
less than 100 A. Memory is placed in standby
mode by setting the PHASE signal at a high level
or when the EPROM Control Register value is 0
and the PHASE signal is low.
PP
= 5V 5%,
PP
=
3.1.6 ID code.
A software identification code, called ID code may
be written in order to distinguish which software
version is stored in the memory.
64 Bytes are dedicated to store this code by using
the address values from 0 to 63.
The ID Code may be read or verified even if the
Memory Lock Status is “0".
The timing signals are the same as that of a normal
operation.
3.2 Eprom Erasure
The
CSDIP32W package, allows the memory contents
to be erased by exposure to UV light.
Erasure begins when the device is exposed to light
with a wavelength shorter than 4000Å. Sunlight, as
well as some types of artificial light, includes
wavelengths in the 3000-4000Å range which, on
prolonged exposure can cause erasure of memory
contents. Therefore, it is recommended that
EPROM devices be fitted with an opaque label
over the window area in order to prevent
unintentional erasure.
The erasure procedure recommended for EPROM
devices consists of exposure to short wave UV
light having a wavelength of 2537Å. The minimum
integrated dose recommended (intensity x expo-
sure time) for complete erasure is 15Wsec/cm 2.
This is equivalent to an erasure time of 15-20
minutes using a UV source having an intensity of
12mW/cm 2 at a distance of 25mm (1 inch) from
the device window.
transparent
window
available
ST52T430/E430
in
23/85
the