ST52T430K3M6 STMicroelectronics, ST52T430K3M6 Datasheet - Page 48

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ST52T430K3M6

Manufacturer Part Number
ST52T430K3M6
Description
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST52T430K3M6

Cpu Family
ST52
Device Core Size
8b
Frequency (max)
20MHz
Interface Type
SCI/UART
Program Memory Type
EPROM
Program Memory Size
8KB
Total Internal Ram Size
256Byte
# I/os (max)
23
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5/5.8V
Operating Supply Voltage (min)
2.7/3V
On-chip Adc
8-chx8-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
34
Package Type
SSO
Lead Free Status / Rohs Status
Not Compliant

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ST52T430/E430
10 PWM/TIMER
ST52x430
peripherals:TIMER0, TIMER1 and TIMER2.
The ST52x430 timers have the same internal
structure. The timer consists of an 8-bit counter
with a 16-bit programmable prescaler, giving a
maximum count of 2
Figure 10.1 Timer Peripheral Block Diagram
Next, the generic timer is called Timer x, where x
can be 0, 1 or 2.
Each timer has two different working modes, which
can be selected by setting the correspondent
TxMODE bits of REG_CONF5, REG_CONF8 and
REG_CONF10 registers: Timer Mode and PWM
(Pulse Width Modulation) Mode.
All Timers have Autoreload Functions in PWM
Mode.
Each
complementary signal on external pins by setting
PAx and PCx bits of REG_CONF12 and
REG_CONF16 (see Table 10.8 and Table 10.9).
Note: In order to enable timer output (TxOUT or
TxOUT) the related pin must be configured in
Output Mode by setting REG_CONF4 and
REG_CONF15 registers (see Table 6.4 and
Table 6.6)
In particular, TIMER0 can also use external
START/STOP signals (Input capture and Output
compare), external RESET signal and external
CLOCK: PA4/T0STRT, PA0/T0RES and PA5/
T0CLK pins.
48/85
CLKM
timer
offers
BIT 0
BIT 0
output
24
three
BIT 1
BIT 1
(see Figure 10.1).
is
on-chip
available,
BIT 2
BIT 2
BIT 3
BIT 3
PWM/Timer
with
8-BIT CO UNTER
16-BIT PRESCALER
17 - 1 M UL TIPLEXER
BIT 4
BIT 4
its
TM RCLK
BIT 5
BIT 5
Note: In order to use T0RST, T0STR, T0CLK
external signals the related pins must be
configured
REG_CONF4 and REG_CONF7 registers (see
Table 6.4 and Table 10.3)
For each timer, the content of the 8-bit counter is
incremented on the Rising Edge of the 16-bit
prescaler output (PRESCOUT) and it can be read
at any instant of the counting phase, saved in a
location of RAM memory. The PWM/Timer x
Counter value can be read from the Input Register
PWM_x_COUNT (Input Registers 12, 14 or 16.
See Table 2.2).
The PWM/Timer x Status can be read from the
Input Register PWM_x_STATUS (Input Registers
13, 15 or 17. See Table 2.2 and Table 10.10).
10.1 Timer Mode
Timer Mode is selected by fixing the TxMODE bit
of
REG_CONF10 equal to 0 (see Table 10.1, Table
10.4 and Table 10.6).
Each TIMERx requires three signals: Timer Clock
(TMRCLKx), Timer Reset (TxRES) and Timer Start
(TxSTRT) (see Figure 10.1). Each of these signals
can be generated internally, or, only for Timer 0,
externally by setting T0RST, T0STR, T0CLK bits of
REG_CONF7 register.
TMRCLKx is the Prescaler x output, which
increments the Counter x value on the rising edge.
TMRCLKx is obtained from the internal clock
signal (CLKM) or, only for TIMER0, from the
external signal provided on the PA5/T0CLK pin.
BIT 6
REG_CONF5,
BIT 7
in
BIT 14
Input
BIT 15
REG_CONF8
Mode
PRESCx
by
TxRES
TxSTRT
setting
and

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