ST52T430K3M6 STMicroelectronics, ST52T430K3M6 Datasheet - Page 34

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ST52T430K3M6

Manufacturer Part Number
ST52T430K3M6
Description
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST52T430K3M6

Cpu Family
ST52
Device Core Size
8b
Frequency (max)
20MHz
Interface Type
SCI/UART
Program Memory Type
EPROM
Program Memory Size
8KB
Total Internal Ram Size
256Byte
# I/os (max)
23
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5/5.8V
Operating Supply Voltage (min)
2.7/3V
On-chip Adc
8-chx8-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
34
Package Type
SSO
Lead Free Status / Rohs Status
Not Compliant

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ST52T430/E430
Figure 6.2 Port B Functional Blocks
Table 6.2 Input Register and I/O Ports
6.3 Output Mode
The output configuration is selected by setting the
corresponding configuration register bit to “0”
(REG_CONF 4, 13 and 15) (see paragraph I/O
Port Configuration Registers).
Digital data is transferred to the related I/O Port by
means of the Output register via the assembler
instructions LDPE or LDPR.
Table 6.3 Output Register and I/O Ports
34/85
PORT A
PORT A
IR 9
OR 0
FROM CONFIGURATION REGISTER
FROM OUTPUT REGISTERS
TO INPUT REGISTER
FROM CONFIGURATION REGISTER
PORT B
PORT B
IR 10
OR 1
TO A/D CONVERTER
PORT C
PORT C
IR 11
OR 2
6.4 Alternate Functions
Several ST52x430 pins are configurable to be
used with different functions (see Table 1.1).
When an on-chip peripheral is configured to use a
pin, the correct I/O mode of the related pin must be
selected.
For example: if pin 26 (PA5/T0CLK in the SO34)
has to be used as an external PWM/Timer0 clock,
the Reg_Conf 4(5) bit must be set to ‘1’.
When the signal is an on-chip peripheral input the
related I/O pin has to be configured in Input Mode.
When a pin is used as an A/D Converter input the
related I/O pin is automatically set in tristate. The
analog
configuration Register) switches the analog
voltage present on the selected pin to the common
analog rail, which is connected to the ADC input.
It is recommended that the voltage level not be
changed or that any port pins not be loaded while
conversion
recommended that clocking pins not be located
close to a selected analog pin.
6.5 I/O Port Configuration Registers
The I/O mode for each bit of the three ports is
selected by using the Configuration Registers 4,
CMOS
multiplexer
is
running.
(controlled
PORT B PIN
Furthermore,
by
the
it
A/D
is

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