ST52T430K3M6 STMicroelectronics, ST52T430K3M6 Datasheet - Page 62

• Manufacturer Part Number: ST52T430K3M6
• Manufacturer: STMicroelectronics

Specifications of ST52T430K3M6

• Cpu Family: ST52
• Device Core Size: 8b
• Frequency (max): 20MHz
• Interface Type: SCI/UART
• Program Memory Type: EPROM
• Program Memory Size: 8KB
• Total Internal Ram Size: 256Byte
• # I/os (max): 23
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5/5.8V
• Operating Supply Voltage (min): 2.7/3V
• On-chip Adc: 8-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 34
• Package Type: SSO
• Lead Free Status / Rohs Status: Not Compliant

ST52T430/E430
11 SERIAL COMMUNICATION INTERFACE
The
integrated into the ST52x430 fuzzy processor
provides
peripheral, which links several widely distributed
MCU’s through their SCI subsystem. SCI offers a
serial interface providing communication with
common baud rates up to 38,400 and flexible
character format.
SCI is a full-duplex UART-type asynchronous
system with standard Non Return to Zero (NRZ)
format for the transmitted/received bit. The length
of the transmitted word is 10/11 bits (1 start bit, 8/
9 data bits, 1 stop bit).
SCI is composed of three modules: Receiver,
Transmitter and Baud-Rate Generator. It is
configured by means of Configuration Registers 19
and 20.
WARNING: IN ORDER TO WORK PROPERLY
WITH SCI PERIPHERALS MAINTAINING THE
DESIRED BAUD RATE A SYSTEM CLOCK OF
ONLY 5, 10 OR 20 MHz MUST BE USED.
11.1 SCI Receiver block
The
synchronization of the serial data stream and
stores data characters. The SCI Receiver is mainly
formed by two sub-systems: Recovery Buffer
Block and SCDR_RX Block.
Figure 11.2 SCI Block Diagram
62/85
Serial
SCI
RAM / EPROM
a
RAM
Receiver
Communication
general
LDPR 9 ram-i
LDPE 9 epr-i
LDRI ram-i 18
purpose
or
block
Interface
manages
OR 9
MCLK
IR 18
shift
register
(SCI)
the
SCI Receiver
SCI Transmitter
Baud-Rate
Generator
Figure 11.1 SCI transmitted word structures
The RE configuration bit (bit 1 of the Configuration
Register 20) enables the SCI Receiver when it is
set to “1”.
SCI receives data deriving from the RX/PC5 pin
and drives the Recovery Buffer Block, which is a
high-speed shift register operating at a clock
frequency (CLOCK_RX) that is 16 times higher
than the fixed baud rate (CLOCK_TX). This
sampling rate, higher than the Baud Rate clock
allows the detection of the START condition, Noise
error and Frame error.
SCDR_RX
SCDR_TX
RECOVERY BUFFER
SHIFT REGISTER
SCI
STOP
10
STOP
9
9
8
8
7
7
6
6
DATA
DATA
5
5
4
4
3
3
RX/PC5
TX/PC4
2
2
1
1
START
START
0
0