ST52T430K3M6 STMicroelectronics, ST52T430K3M6 Datasheet - Page 39

• Manufacturer Part Number: ST52T430K3M6
• Manufacturer: STMicroelectronics

Specifications of ST52T430K3M6

• Cpu Family: ST52
• Device Core Size: 8b
• Frequency (max): 20MHz
• Interface Type: SCI/UART
• Program Memory Type: EPROM
• Program Memory Size: 8KB
• Total Internal Ram Size: 256Byte
• # I/os (max): 23
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5/5.8V
• Operating Supply Voltage (min): 2.7/3V
• On-chip Adc: 8-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 34
• Package Type: SSO
• Lead Free Status / Rohs Status: Not Compliant

7 FUZZY COMPUTATION (DP)
The ST52T430/E430 Decision Processor (DP)
main features are:
I
I
I
I
I
The limits on the number of Fuzzy Rules and
Fuzzy program blocks are only related to the
Program/Data Memory size.
7.1 Fuzzy Inference
The block diagram shown in Figure 7.1 describes
the different steps performed during a Fuzzy
algorithm. The ST52T430/E430 Core allows for the
implementation of a Mamdani type fuzzy inference
with crisp consequents. Inputs for fuzzy inference
are stored in 8 dedicated Fuzzy input registers.
The LDFR instruction is used to set the Input Fuzzy
registers with values stored in the Register File.
The result of a Fuzzy inference is stored directly in
a location of the Register File.
7.2 Fuzzyfication Phase
In this phase the intersection (alpha weight)
between the input values and the related Mbfs
(Figure 7.2) is performed.
Eight Fuzzy Input registers are available for Fuzzy
inferences.
Figure 7.1 Fuzzy Inference
Up to 8 Inputs with 8-bit resolution;
1 Kbyte of Program/Data Memory available to
store more than 300 to Membership Functions
(Mbfs) for each Input;
Up to 128 Outputs with 8-bit resolution;
Possibility of processing fuzzy rules with an
UNLIMITED number of antecedents;
UNLIMITED number of Rules and Fuzzy Blocks.
FUZZYFICATION
Input Values
11
nm
1m
n1
INFERENCE
PHASE
Figure 7.2 Alpha Weight Calculation
After loading the input values by using the LDFR
assembler instruction, the user can start the fuzzy
inference
instruction. During fuzzyfication: input data is
transformed in the activation level (alpha weight) of
the Mbf’s.
7.3 Inference Phase
The Inference Phase manages the alpha weights
obtained during the fuzzyfication phase to compute
the truth value ( ) for each rule.
This is a calculation of the maximum (for the OR
operator) and/or minimum (for the AND operator)
performed on alpha values according to the logical
connectives of Fuzzy Rules.
Several conditions may be linked together by
linguistic connectives AND/OR, NOT operators
and brackets.
The truth value
are used by the Defuzzyfication phase, in order
to complete the inference calculation.
ij
1
1
N rules -1
N rules
2
by
using
and the related output singleton
DEFUZZYFICATION
j-th Mbf
the
Output Values
FUZZY
ST52T430/E430
i-th INPUT VARIABLE
assembler
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