A25L040O-F AMIC, A25L040O-F Datasheet - Page 25

• Manufacturer Part Number: A25L040O-F
• Description: 58T1309
• Manufacturer: AMIC

Specifications of A25L040O-F

• Memory Type: Flash
• Memory Size: 4Mbit
• Memory Configuration: 4M X 1
• Interface Type: Serial, SPI
• Clock Frequency: 100MHz
• Supply Voltage Range: 2.7V To 3.6V
• Memory Case Style: SOIC
• No. Of Pins: 8
• Rohs Compliant: Yes

Release
Electronic Signature (RES)
Once the device has entered the Deep Power-down mode,
all instructions are ignored except the Release from Deep
Power-down
instruction. Executing this instruction takes the device out of
the Deep Power-down mode.
The instruction can also be used to read, on Serial Data
Output (DO), the 8-bit Electronic Signature, whose value for
the A25L040 is 12h.
Except while an Erase, Program or Write Status Register
cycle is in progress, the Release from Deep Power-down and
Read Electronic Signature (RES) instruction always provides
access to the 8-bit Electronic Signature of the device, and
can be applied even if the Deep Power-down mode has not
been entered.
Any Release from Deep Power-down and Read Electronic
Signature (RES) instruction while an Erase, Program or Write
Status Register cycle is in progress, is not decoded, and has
no effect on the cycle that is in progress.
The device is first selected by driving Chip Select (
The instruction code is followed by 3 dummy bytes, each bit
being latched-in on Serial Data Input (DIO) during the rising
Figure 19. Release from Deep Power-down and Read Electronic Signature (RES) Instruction Sequence and
Data-Out Sequence
(October, 2010, Version 1.2)
Note: The value of the 8-bit Electronic Signature, for the A25L040 is 12h.
DIO
DO
S
C
from
and
0 1
High Impedance
Deep
Read
2 3 4
Instruction
Power-down
Electronic
5 6 7
MSB
23 22 21
Signature
8
9
3 Dummy Bytes
and
10
S
Read
) Low.
(RES)
3 2 1 0
28 29 30 31 32 33 34 35 36 37 38
24
edge of Serial Clock (C). Then, the 8-bit Electronic Signature,
stored in the memory, is shifted out on Serial Data Output
(DO), each bit being shifted out during the falling edge of
Serial Clock (C).
The instruction sequence is shown in Figure 19.
The Release from Deep Power-down and Read Electronic
Signature (RES) instruction is terminated by driving Chip
Select (
at least once. Sending additional clock cycles on Serial Clock
(C), while Chip Select (
Electronic Signature to be output repeatedly.
When Chip Select (
Stand-by Power mode. If the device was not previously in the
Deep Power-down mode, the transition to the Stand-by
Power mode is immediate. If the device was previously in the
Deep Power-down mode, though, the transition to the Stand-
by Power mode is delayed by t
must remain High for at least t
Characteristics Table . Once in the Stand-by Power mode,
the device waits to be selected, so that it can receive, decode
and execute instructions.
MSB
7
Deep Power-down Mode
6 5 4 3 2 1 0
S
) High after the Electronic Signature has been read
S
) is driven High, the device is put in the
AMIC Technology Corp.
S
) is driven Low, cause the
RES2
t
RES2
RES2
(max), as specified in AC
A25L040 Series
, and Chip Select (
Stand-by Mode
S
)