MT29F8G08AAAWP-ET:ATR Micron Technology Inc, MT29F8G08AAAWP-ET:ATR Datasheet - Page 34

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MT29F8G08AAAWP-ET:ATR

Manufacturer Part Number
MT29F8G08AAAWP-ET:ATR
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT29F8G08AAAWP-ET:ATR

Cell Type
NAND
Density
8Gb
Access Time (max)
18ns
Interface Type
Parallel
Boot Type
Not Required
Address Bus
30b
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Package Type
TSOP-I
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8b
Number Of Words
1G
Supply Current
30mA
Mounting
Surface Mount
Pin Count
48
Lead Free Status / Rohs Status
Compliant
RESET Operation
RESET FFh
Figure 29:
Table 10:
PDF: 09005aef818a56a7 / Source: 09005aef81590bdd
2gb_nand_m29b__2.fm - Rev. I 1/06 EN
Condition
WP# HIGH
WP# LOW
Status Register Contents After RESET Operation
RESET Operation
Status
Ready
Ready and write protected
The RESET command is used to put the memory device into a known condition and to
abort a command sequence in progress.
RANDOM READ, PROGRAM, and ERASE commands can be aborted while the device is
in the busy state. The contents of the memory location being programmed or the block
being erased are no longer valid. The data may be partially erased or programmed, and
is invalid. The command register is cleared and is ready for the next command.
The status register contains the value E0h when WP# is HIGH; otherwise it is written
with a 60h value. R/B# goes low for
command register. (See Figure 29 and Table 10.)
WE#
R/B#
I/Ox
CLE
CE#
Bit 7
1
0
Command
RESET
FF
2, 4, 8Gb: x8/x16 Multiplexed NAND Flash Memory
Bit 6
1
1
t
34
WB
Bit 5
1
1
t
RST after the RESET command is written to the
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Bit 4
0
0
t
RST
Bit 3
0
0
Bit 2
0
0
Command Definitions
©2004 Micron Technology, Inc. All rights reserved.
Bit 1
0
0
Bit 0
0
0
Hex
E0h
60h

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