cp3bt13 National Semiconductor Corporation, cp3bt13 Datasheet - Page 21

• Manufacturer Part Number: cp3bt13
• Description: Cp3bt13 Reprogrammable Connectivity Processor With Bluetooth-r And Can Interfaces
• Manufacturer: National Semiconductor Corporation

5.6
A stack is a last-in, first-out data structure for dynamic stor-
age of data and addresses. A stack consists of a block of
memory used to hold the data and a pointer to the top of the
stack. As more data is pushed onto a stack, the stack grows
downward in memory. The CR16C supports two types of
stacks: the interrupt stack and program stacks.
5.6.1
The processor uses the interrupt stack to save and restore
the program state during the exception handling. Hardware
automatically pushes this data onto the interrupt stack be-
fore entering an exception handler. When the exception
handler returns, hardware restores the processor state with
data popped from the interrupt stack. The interrupt stack
pointer is held in the ISP register.
5.6.2
The program stack is normally used by software to save and
restore register values on subroutine entry and exit, hold lo-
cal and temporary variables, and hold parameters passed
between the calling routine and the subroutine. The only
hardware mechanisms which operate on the program stack
are the PUSH, POP, and POPRET instructions.
5.6.3
To support multitasking operating systems, support is pro-
vided for two program stack pointers: a user stack pointer
and a supervisor stack pointer. When the PSR.U bit is clear,
the SP register is used for all program stack operations. This
is the default mode when the user/supervisor protection
mechanism is not used, and it is the supervisor mode when
protection is used.
When the PSR.U bit is set, the processor is in user mode,
and the USP register is used as the program stack pointer.
User mode can only be entered using the JUSR instruction,
which performs a jump and sets the PSR.U bit. User mode
is exited when an exception is taken and re-entered when
the exception handler returns. In user mode, the LPRD in-
struction cannot be used to change the state of processor
registers (such as the PSR).
User and Supervisor Stack Pointers
STACKS
Interrupt Stack
Program Stack
21
5.7
Table 6 lists the operand specifiers for the instruction set,
and Table 7 is a summary of all instructions. For each in-
struction, the table shows the mnemonic and a brief de-
scription of the operation performed.
In the mnemonic column, the lower-case letter “i” is used to
indicate the type of integer that the instruction operates on,
either “B” for byte or “W” for word. For example, the notation
ADDi for the “add” instruction means that there are two
forms of this instruction, ADDB and ADDW, which operate
on bytes and words, respectively.
Similarly, the lower-case string “cond” is used to indicate the
type of condition tested by the instruction. For example, the
notation Jcond represents a class of conditional jump in-
structions: JEQ for Jump on Equal, JNE for Jump on Not
Equal, etc. For detailed information on all instructions, see
the CompactRISC CR16C Programmer's Reference Manu-
al.
Operand Specifier
Rsrc, Rsrc1, Rsrc2
RPbase, RPbasex
Rposition
RPtarget
Iposition
RPdest
Rprocd
Rindex
Rbase
RPlink
RPsrc
INSTRUCTION SET
Rdest
Rproc
Table 6 Key to Operand Specifiers
disp
imm
abs
Immediate operand (numeric suf-
Base register pair (relative mode)
Displacement (numeric suffix
Base register (relative mode)
fix indicates number of bits)
indicates number of bits)
16-bit processor register
32-bit processor register
Destination register pair
Bit position in memory
Bit position in register
Source register pair
Destination register
Target register pair
Absolute address
Link register pair
Source register
Index register
Description
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