cp3bt13 National Semiconductor Corporation, cp3bt13 Datasheet - Page 63

• Manufacturer Part Number: cp3bt13
• Description: Cp3bt13 Reprogrammable Connectivity Processor With Bluetooth-r And Can Interfaces
• Manufacturer: National Semiconductor Corporation

13.1.5
The WKICTL2 register is a word-wide read/write register
that selects the interrupt request signal for the associated
MIWU channels WUI15 to WUI8. At reset, the WKICTL2
register is cleared, which selects MIWU Interrupt Request 0
for all eight channels. The register format is shown below.
WKINTR
13.1.6
The WKPND register is a word-wide read/write register in
which the Multi-Input Wake-Up module latches any detect-
ed trigger conditions. The CPU can only write a 1 to any bit
position in this register. If the CPU attempts to write a 0, it
has no effect on that bit. To clear a bit in this register, the
CPU must use the WKPCL register. This implementation
prevents a potential hardware-software conflict during a
read-modify-write operation on the WKPND register.
This register is cleared upon reset. The register format is
shown below.
WKPD
15 14 13 12 11 10 9
WKIN
TR15
15
WKIN
TR14
(WKICTL2)
Wake-Up Pending Register (WKPND)
Wake-Up Interrupt Control Register 2
The Wake-Up Interrupt Request Select fields
select which of the four MIWU interrupt re-
quests are activated for the corresponding
channel.
00 – Selects MIWU interrupt request 0.
01 – Selects MIWU interrupt request 1.
10 – Selects MIWU interrupt request 2.
11 – Selects MIWU interrupt request 3.
The Wake-Up Pending bits indicate which
MIWU channels have been triggered. The
WKPD[15:0] bits correspond to the WUI[15:0]
channels. Writing 1 to a bit sets it.
0
1
WKIN
–
–
TR13
Trigger condition did not occur.
Trigger condition occurred.
WKIN
TR12
WKPD
8
WKIN
TR11
7
6
WKIN
TR10
5
4
WKIN
3
TR9
2
WKIN
1
TR8
0
0
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13.1.7
The Wake-Up Pending Clear (WKPCL) register is a word-
wide write-only register that lets the CPU clear bits in the
WKPND register. Writing a 1 to a bit position in the WKPCL
register clears the corresponding bit in the WKPND register.
Writing a 0 has no effect. Do not modify this register with in-
structions that access the register as a read-modify-write
operand, such as the bit manipulation instructions.
Reading this register location returns undefined data.
Therefore, do not use a read-modify-write sequence (such
as the SBIT instruction) to set individual bits. Do not attempt
to read the register, then perform a logical OR on the regis-
ter value. Instead, write the mask directly to the register ad-
dress. The register format is shown below.
WKCL
13.2
To set up and use the Multi-Input Wake-Up function, use the
following procedure. Performing the steps in the order
shown will prevent false triggering of a wake-up condition.
This same procedure should be used following a reset be-
cause the wake-up inputs are left floating, resulting in un-
known data on the input pins.
To change the edge sensitivity of a wake-up channel, use
the following procedure. Performing the steps in the order
shown will prevent false triggering of a wake-up/interrupt
condition.
1. Clear the WKENA register to disable the MIWU chan-
2. Write the WKEDG register to select the desired type of
3. Set all bits in the WKPCL register to clear any pending
4. Set up the WKICTL1 and WKICTL2 registers to define
5. Set the bits in the WKENA register corresponding to
1. Clear the WKENA bit associated with the input to be re-
2. Write the new value to the corresponding bit position in
3. Set the corresponding bit in the WKPCL register to
4. Set the same WKENA bit to re-enable the wake-up
15
nels.
edge sensitivity (clear for rising edge, set for falling
edge).
bits in the WKPND register.
the interrupt request signal used for each channel.
the wake-up channels to be activated.
programmed.
the WKEDG register to reprogram the edge sensitivity
of the input.
clear the pending bit in the WKPND register.
function.
Wake-Up Pending Clear Register (WKPCL)
PROGRAMMING PROCEDURES
Writing 1 to a bit clears it.
0
1
–
–
Writing 0 has no effect.
Writing 1 clears the corresponding bit in
the WKPD register.
WKCL
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