cp3bt13 National Semiconductor Corporation, cp3bt13 Datasheet - Page 229

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cp3bt13

Manufacturer Part Number
cp3bt13
Description
Cp3bt13 Reprogrammable Connectivity Processor With Bluetooth-r And Can Interfaces
Manufacturer
National Semiconductor Corporation
Datasheet
29.0 Revision History
10/16/02
11/11/02
11/21/02
11/14/03
8/15/02
9/25/02
10/8/02
1/13/03
5/20/03
8/5/02
Date
Split the CP3BT10/CP3BT13 data sheet
into separate data sheets for each chip.
Added description of RDPROT field.
Clarified conditions for software DMA
transfer request in Section 9.4. Removed
commercial temperature range device.
Changed I/O Zone bus width to allow 8 bits.
Clarified UART synchronous mode only
allowed on 100-pin devices.
Changed flash programming sequence to
remove checking FMBUSY after each row.
Corrections to flash memory programming
sequence and MFT block diagrams.
Numerous minor corrections. Added more
description to AAI section. Added external
reset circuit. Fixed problems with figures.
Converted to new data sheet format.
Removed erroneous warning to always
write the IOCFG register with bit 1 set.
Alternate clock source for Advanced Audio
Interface changed to Aux1 clock. Changed
warning about clock glitches to say
Microwire interface must be disabled when
modifying bits in MWCTL1 register.
Changed bit settings which occur in step 2
of the sequence of ACCESS.bus slave
mode address match or global match. Timer
Mode Control Register bit 7 is the TEN bit (a
bit description has been added). Polarity of
all of the bits in the INTCTL register has
been inverted.
Updated DC specifications. Fixed errors in
Microwire bit and pin names. Changed
UART pin names to TXD and RXD. Added
Section 11.6 “Auxiliary Clocks”. Changed
diagram of I/O Port Pin Logic (Section 14).
Defined valid range of SCDV field in
Microwire/SPI module. Noted default
PRSSC register value generates a Slow
Clock frequency slightly higher than 32768
Hz. Clarified usage of CVSTAT register bits
and fields in CVSD/PCM module. Updated
layout of Bluetooth LLC registers. Added
usage hint for avoiding ACCESS.bus
module bus error. Added usage hint for
avoiding CAN unexpected loopback
condition.
Major Changes From Previous Version
Table 82 Revision History
229
2/28/04
3/16/04
5/20/04
Date
Table 82 Revision History (Continued)
Changed NSID designations in the product
selection guide. Updated Bluetooth section
for LMX5251 and LMX5252 radio chips.
Added BTSEQ[3:1] signals to pin
descriptions, GPIO alternate functions, and
package pin assignments. Added entry for
CTIM register in CAN section register list.
Changed CVSD Conversion section.
Changed definition of the RESOLUTION
field of the CVSD Control register
(CVCTRL). Changed DC specification for
Vxl2.
Changed LMX5251 interface circuit.
Updated DC specifications Iccid and Iccq.
Moved revision history in front of physical
dimensions. Changed back page
disclaimers.
Major Changes From Previous Version
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