mc68hc05x4dw Freescale Semiconductor, Inc, mc68hc05x4dw Datasheet - Page 103

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mc68hc05x4dw

Manufacturer Part Number
mc68hc05x4dw
Description
Xc68hc705x4 Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1-ctimer
Contents
Introduction
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
Real time interrupts (RTI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
Computer operating properly (COP) watchdog timer . . . . . . . . . . . . 105
Core timer registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
Core timer during WAIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
Core timer during STOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
The MC68HC05X4 has a 15-stage ripple counter called the core timer
(CTIMER). Features of this timer are: timer overflow, power-on reset
(POR), real time interrupt (RTI) with four selectable interrupt rates, and
a computer operating properly (COP) watchdog timer.
As shown in
by four with a fixed prescaler. This signal drives an 8-bit ripple counter.
The value of this 8-bit ripple counter can be read by the CPU at any time,
by accessing the CTIMER counter register (CTCR) at address $09. A
timer overflow function is implemented on the last stage of this counter,
giving a possible interrupt at the rate of f
(t
circuit is followed by four more stages, with the resulting clock
(f
of three divider stages with a 1-of-4 selector. The output of the RTI circuit
is further divided by eight to drive the COP watchdog timer circuit. The
RTI rate selector bits, and the RTI and CTIMER overflow enable bits and
PORL
OP
Freescale Semiconductor, Inc.
Core timer control and status register (CTCSR) . . . . . . . . . . . . . . 106
Core timer counter register (CTCR) . . . . . . . . . . . . . . . . . . . . . . . 108
/16384) driving the real time interrupt circuit. The RTI circuit consists
For More Information On This Product,
) is also derived from this register, at f
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Figure
Core Timer
1, the timer is driven by the internal bus clock divided
OP
/1024. The POR signal
OP
/32. The counter register
General Description
MC68HC05X4 Rev 1.0
Core Timer

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