mc68hc05x4dw Freescale Semiconductor, Inc, mc68hc05x4dw Datasheet - Page 49
mc68hc05x4dw
Manufacturer Part Number
mc68hc05x4dw
Description
Xc68hc705x4 Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC68HC05X4DW.pdf
(156 pages)
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RESET pin
Illegal address
reset
Computer
operating properly
(COP) reset
Interrupts
3-resets
When the oscillator is running in a stable state, the MCU is reset when a
logic zero is applied to the RESET input for a minimum period of 1.5
machine cycles (t
part of its input to improve noise immunity.
When an opcode fetch occurs from an address which is not part of the
RAM ($0050 – $00FF) or of the NVM ($0F00 – $1F00 and $1FF0 –
$1FFF) then the device is automatically reset.
The MCU contains a watchdog timer that automatically times out if not
reset (cleared) within a specific time by a program reset sequence. If the
COP watchdog timer is allowed to time-out, an internal reset is
generated to reset the MCU. Because the internal reset signal is used,
the MCU comes out of a COP reset in the same operating mode it was
in when the COP time-out was generated.
The COP reset function is enabled or disabled by a mask option.
Refer to
more information on the COP watchdog timer.
The MCU can be interrupted by five different sources, four maskable
hardware interrupts and one non-maskable software interrupt:
Interrupts cause the processor to save the register contents on the stack
and to set the interrupt mask (I-bit) to prevent additional interrupts. The
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Freescale Semiconductor, Inc.
For More Information On This Product,
MCAN
Wired-OR function on ports A and B
Core timer
16-bit programmable timer
Software Interrupt instruction (SWI)
Resets, Interrupts and Low Power Modes
Computer operating properly (COP) watchdog timer
Go to: www.freescale.com
CYC
). This pin contains an internal Schmitt Trigger as
Resets, Interrupts and Low Power Modes
MC68HC05X4 Rev 1.0
Interrupts
for
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