mc68hc05x4dw Freescale Semiconductor, Inc, mc68hc05x4dw Datasheet - Page 45

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mc68hc05x4dw

Manufacturer Part Number
mc68hc05x4dw
Description
Xc68hc705x4 Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
TST opr
TSTA
TSTX
TST opr ,X
TST ,X
TXA
WAIT
19-cpu
A
C
CCR Condition code register
dd
dd rr
DIR
ee ff
EXT
ff
H
hh ll
I
ii
IMM
INH
IX
IX1
IX2
M
N
n
Source
Form
Accumulator
Carry/borrow flag
Direct address of operand
Direct address of operand and relative offset of branch instruction
Direct addressing mode
High and low bytes of offset in indexed, 16-bit offset addressing
Extended addressing mode
Offset byte in indexed, 8-bit offset addressing
Half-carry flag
High and low bytes of operand address in extended addressing
Interrupt mask
Immediate operand byte
Immediate addressing mode
Inherent addressing mode
Indexed, no offset addressing mode
Indexed, 8-bit offset addressing mode
Indexed, 16-bit offset addressing mode
Memory location
Negative flag
Any bit
Test Memory Byte for Negative or Zero
Transfer Index Register to Accumulator
Stop CPU Clock and Enable Interrupts
Table 6. Instruction Set Summary (Continued)
Operation
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
CPU
Description
(M) – $00
A
opr
PC
PCH Program counter high byte
PCL Program counter low byte
rel
SP
X
Z
( )
–( )
?
:
REL Relative addressing mode
rr
#
(X)
Operand (one or two bytes)
Program counter
Relative program counter offset byte
Relative program counter offset byte
Stack pointer
Index register
Zero flag
Immediate value
Logical AND
Logical OR
Logical EXCLUSIVE OR
Contents of
Negation (two’s complement)
Loaded with
If
Concatenated with
Set or cleared
Not affected
H I N Z C
— —
— — — — —
Effect on
0
CCR
— — —
Instruction Set Summary
MC68HC05X4 Rev 1.0
DIR
INH
INH
INH
INH
IX1
IX
3D
4D
5D
6D
7D
9F
8F
dd
ff
CPU
4
3
3
5
4
2
2

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