mc68hc05x4dw Freescale Semiconductor, Inc, mc68hc05x4dw Datasheet - Page 84

• Manufacturer Part Number: mc68hc05x4dw
• Description: Xc68hc705x4 Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

MCAN interrupt
register (CINT)
Motorola CAN
MC68HC05X4
Reset: with RR bit set
External Reset:
Address:
RBS — Receive buffer status
All bits of this register are read only; all are cleared by a read of the
register.
This register must be read in the interrupt handling routine in order to
enable further interrupts.
WIF — Wake-up interrupt flag
This bit is set by the MCAN when a new message is available. When
clear this indicates that no message has become available since the
last RRB command. The bit is cleared when RRB is set. However, if
the second receive buffer already contains a message, then control of
that buffer is given to the CPU and RBS is immediately set again. The
first receive buffer is then available for the next incoming message
from the MCAN.
If the MCAN detects bus activity whilst it is asleep, it clears the SLEEP
bit in the CCOM register; the WIF bit will then be set. WIF is cleared
by reading the MCAN interrupt register (CINT), or by an external
reset.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Full – A new message is available for the CPU to read.
0 = Empty – No new message is available.
1 = MCAN has detected activity on the bus and requested
0 = No wake-up interrupt has occurred.
$0023
Bit 7
Figure 7. MCAN Interrupt Register (CINT)
wake-up.
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6
-
-
Motorola CAN
5
-
-
WIF
4
0
u
OIF
3
0
0
EIF
2
0
u
TIF
1
0
0
Bit 0
16-mcan
RIF
0
0