mc68hc05x4dw Freescale Semiconductor, Inc, mc68hc05x4dw Datasheet - Page 80

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mc68hc05x4dw

Manufacturer Part Number
mc68hc05x4dw
Description
Xc68hc705x4 Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Motorola CAN
MC68HC05X4
NOTE:
SLEEP — Go to sleep
If SLEEP is set during the reception or transmission of a message, the
MCAN will generate an immediate wake-up interrupt. (This allows for a
more orthogonal software implementation on the CPU.) This will have no
effect on the transfer layer, i.e. no message will be lost or corrupted.
The CAF flag in the port configuration register indicates whether or not
sleep mode was entered successfully.
A node that was sleeping and has been awakened by bus activity will not
be able to receive any messages until its oscillator has started and it has
found a valid end of frame sequence (11 recessive bits). The designer
must take this into consideration when planning to use the sleep
command.
COS — Clear overrun status
When the SLEEP bit is set during a non synchronous state, an
immediate wake-up wil be generated by the MCAN module. (See RR
bit description for more details.)
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Sleep – The MCAN will go into sleep mode, as long as there is
0 = Wake-up – The MCAN will function normally. If SLEEP is
1 = This clears the read-only data overrun status bit in the CSTAT
0 = No action.
no activity on the bus. Otherwise the MCAN will issue a
wake-up interrupt.
cleared by the CPU then the MCAN will waken up, but will not
issue a wake-up interrupt.
register (see
written at the same time as RRB.
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Motorola CAN
MCAN status register
(CSTAT)). It may be
12-mcan

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