mc68hc05x4dw Freescale Semiconductor, Inc, mc68hc05x4dw Datasheet - Page 145

• Manufacturer Part Number: mc68hc05x4dw
• Description: Xc68hc705x4 Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

subroutine — A sequence of instructions to be used more than once in the course of a program.
synchronous — Refers to logic circuits and operations that are synchronized by a common
TIM — See "timer interface module (TIM)."
timer interface module (TIM) — A module used to relate events in a system to a point in time.
timer — A module used to relate events in a system to a point in time.
toggle — To change the state of an output from a logic 0 to a logic 1 or from a logic 1 to a logic 0.
tracking mode — Mode of low-jitter PLL operation during which the PLL is locked on a
two’s complement — A means of performing binary subtraction using addition techniques. The
unbuffered — Utilizes only one register for data; new data overwrites current data.
unimplemented memory location — A memory location that is not used. Writing to an
V —The overflow bit in the condition code register of the CPU08. The CPU08 sets the V bit when
variable — A value that changes during the course of program execution.
VCO — See "voltage-controlled oscillator."
The last instruction in a subroutine is a return from subroutine (RTS) instruction. At each
place in the main program where the subroutine instructions are needed, a jump or branch
to subroutine (JSR or BSR) instruction is used to call the subroutine. The CPU leaves the
flow of the main program to execute the instructions in the subroutine. When the RTS
instruction is executed, the CPU returns to the main program where it left off.
reference signal.
frequency. Also see "acquisition mode."
most significant bit of a two’s complement number indicates the sign of the number (1
indicates negative). The two’s complement negative of a number is obtained by inverting
each bit in the number and then adding 1 to the result.
unimplemented location has no effect. Reading an unimplemented location returns an
unpredictable value. Executing an opcode at an unimplemented location causes an illegal
address reset.
a two's complement overflow occurs. The signed branch instructions BGT, BGE, BLE,
and BLT use the overflow bit.
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Glossary
MC68HC0X4 Rev 1.0
Glossary