mc68hc05x4dw Freescale Semiconductor, Inc, mc68hc05x4dw Datasheet - Page 67

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mc68hc05x4dw

Manufacturer Part Number
mc68hc05x4dw
Description
Xc68hc705x4 Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Port A data
direction register
(PADDR)
Port B data
direction register
(PBDDR)
5-ports
NOTE:
BPDE — Port B pull-down enable
BWE — Port B WOI enable
AWPS — Port A WOI and pull-down select
Addresses $00 and $04 in the memory map are shared by two pairs of
registers. The state of the AWPS bit determines which pair of registers
are accessible at any time. When AWPS is clear the port A data register
is found at $00, and the port A data direction register at $04. When
AWPS is set, $00 becomes the port A WOI enable register, and $04 the
port A pull-down enable register. See
Writing a ‘1’ to any bit configures the corresponding bit in the port A data
register as an output; conversely, writing any bit to ‘0’ configures the
corresponding port A bit as an input.
Reset clears this register.
If the AWPS bit in the PCR is set then this location becomes the
port A pull-down enable register. Writing a ‘1’ to any bit enables the
pull-down on the corresponding port A line.
Writing a ‘1’ to any bit configures the corresponding bit in the port B data
register as an output. Conversely, writing any bit to ‘0’ configures the
corresponding port B bit as an input.
Reset clears this register.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Enables pull-down on port B.
0 = Disables pull-down on port B.
1 = Enables wired-OR interrupt on port B.
0 = Disables wired-OR interrupt on port B.
1 = The port A WOI enable and pull-down enable registers are
0 = The port A data and data direction registers are accessible.
accessible.
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Parallel input/output ports
Input/output
Parallel input/output ports
MC68HC05X4 Rev 1.0
programming.
Port registers

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