w83l517g Winbond Electronics Corp America, w83l517g Datasheet - Page 128

• Manufacturer Part Number: w83l517g
• Description: Winbond Lpc I/o For Notebook W83l517d/ W83l517d-f
• Manufacturer: Winbond Electronics Corp America

CRF4 (Default 0x00)
CRF9 (Default 0x00)
13.
Bit 7 - 3: Reserved. Return zero when read.
Bit 2: PME_EN: Select the power management events to be either an PME or SMI interrupt
Bit 1: FSLEEP: This bit selects the fast expiry time of individual devices.
Bit 0: SMIPME_OE: This is the SMI and
W83L517D/W83L517D-F
for the IRQ events. Note that: this bit is valid only when SMIPME_OE = 1.
= 0 the power management events will generate an SMI event.
= 1 the power management events will generate an
= 0 neither SMI nor
= 1 an SMI or
status bit is set by their source device and is cleared by writing a 1. Writing a 0 has no effect.
respectively. The status bit is set by their source function or device and is cleared by writing
a1. Writing a 0 has no effect.
These bits indicate the IRQ status of the individual device respectively. The device's IRQ
Bit 3: PRTIRQSTS. printer port IRQ status.
Bit 2: FDCIRQSTS. FDC IRQ status.
Bit 1: URAIRQSTS. UART A IRQ status.
Bit 0: URBIRQSTS. FIR IRQ status.
Bit 7 ~ 4: Reserved. Return zero when read.
Bit 3 ~ 0: These bits indicate the IRQ status of the individual GPIO function or logical device
Bit 2: WDTIRQSTS. Watch dog timer IRQ status.
Bit 1~0: Reserved
= 0 1 S
= 1 8 mS.
ORDERING INSTRUCTION
PART NO.
PME
event will be generated.
PME
will be generated. Only the IRQ status bit is set.
100-pin LQFP
PME
PACKAGE
- 128 -
output enable bit.
W83L517D/W83L517D-F
PME
event.
REMARKS