w83l517g Winbond Electronics Corp America, w83l517g Datasheet - Page 57

• Manufacturer Part Number: w83l517g
• Description: Winbond Lpc I/o For Notebook W83l517d/ W83l517d-f
• Manufacturer: Winbond Electronics Corp America

8.2
8.2.1
Receiver Buffer Register is read only and Transmitter Buffer Register is write only. When operating in
the PIO mode, the port is used to Receive/Transmit 8-bit data.
When function as a legacy IR, this port only supports PIO mode. If set in the advanced IR mode and
configured as MIR/FIR/Remote IR, this port can support DMA transmission. Two DMA channels can
be used simultaneously, one for TX DMA and the other for RX DMA. Therefore, single DMA channel
is also supported when the bit of D_CHSW (DMA Channel Swap, in Set2.Reg2.Bit3) is set and the
TX/RX DMA channel is swapped. Note that two DMA channels can be defined in configure register
CR2A which selects DMA channel or disables DMA channel. If only RX DMA channel is enabled
while TX DMA channel is disabled, then the single DMA channel will be selected.
8.2.2
The advanced IR functions including Advanced SIR/ASK-IR, MIR, FIR, or Remote IR are described
below.
Bit 7:
Advanced IR
Legacy IR
MODE
ADDRESS
OFFSET
Set0-Legacy/Advanced IR Control and Status Registers
Set0.Reg0 - Receiver/Transmitter Buffer Registers (RBR/TBR) (Read/Write)
Set0.Reg1 - Interrupt Control Register (ICR)
0
1
2
3
4
5
6
7
Legacy IR Mode:
Advanced IR Mode:
Not used. A read will return 0.
ETMRI - Enable Timer Interrupt
A write to 1 will enable timer interrupt.
ETMRI
B7
0
UDR/ESCR
REGISTER
RBR/TBR
UCR/SSR
ISR/UFR
NAME
HCR
USR
HSR
ICR
EFSFI
B6
0
Receiver/Transmitter Buffer Registers
Interrupt Control Register
Interrupt Status or IR FIFO Control Register
IR Control or Sets Select Register
Handshake Control Register
IR Status Register
Handshake Status Register
User Defined Register
ETXTHI
B5
0
EDMAI
- 57 -
B4
0
REGISTER DESCRIPTION
W83L517D/W83L517D-F
B3
0
0
Publication Release Date: May 23, 2005
EUSRI/
EUSRI
TXURI
B2
ETBREI
ETBREI
B1
Revision 1.0
ERDRI
ERBRI
B0