w83l517g Winbond Electronics Corp America, w83l517g Datasheet - Page 66

• Manufacturer Part Number: w83l517g
• Description: Winbond Lpc I/o For Notebook W83l517d/ W83l517d-f
• Manufacturer: Winbond Electronics Corp America

8.2.7
Legacy IR Register:
This is a temporary register that can be accessed and defined by the user.
Advanced IR Register:
Legacy IR
Advanced
Bit 7
Bit 6
Bit 5
Bit 4:
Reset Value
MODE
IR
Set0.Reg6 - Reserved
MIR, FIR Modes:
MIR, FIR Modes:
MIR, FIR Modes:
Remote IR mode:
MIR, FIR modes:
Remote IR Modes:
FLC_ACT UNDRN
FLC_ACT - Flow Control Active
Set to 1 when the flow control occurs. Cleared to 0 when this register is read. Note that
this will be affected by Set5.Reg2 which controls the SIR mode switches to MIR/FIR
mode or MIR/FIR mode operated in DMA function switches to SIR mode.
UNDRN - Underrun
Set to 1 when transmitter is empty and S_FEND (bit 3 of this register) is not set in PIO
mode or no TC (Terminal Count) in DMA mode. Cleared to 0 after a write to 1.
RX_BSY - Receiver Busy
Set to 1 when receiver is busy or active in process.
RX_IP - Receiver in Process
Set to 1 when receiver is in process.
LST_FE - Lost Frame End
Set to 1 when a frame end in a entire frame is lost. Cleared to 0 when this register is
read.
RX_PD - Receiver Pulse Detected
Set to 1 when one or more remote pulses are detected. Cleared to 0 when this register
is read.
BIT 7
Bit 7
0
BIT 6
Bit 6
Set0.Reg7 - User Defined Register (UDR/AUDR)
0
RX_BSY/
RX_IP
BIT 5
Bit 5
0
LST_FE/
- 66 -
RX_PD
BIT 4
Bit 4
0
W83L517D/W83L517D-F
S_FEND
BIT 3
Bit 3
0
BIT 2
Bit 2
0
0
LB_SF
BIT 1
Bit 1
0
RX_TO
BIT 0
Bit 0
0