w83l517g Winbond Electronics Corp America, w83l517g Datasheet - Page 65

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w83l517g

Manufacturer Part Number
w83l517g
Description
Winbond Lpc I/o For Notebook W83l517d/ W83l517d-f
Manufacturer
Winbond Electronics Corp America
Datasheet
8.2.6
Legacy IR Register: These registers are defined the same as previous description.
Advanced IR Register:
Bit 7:
Bit 6, 5:
Bit 4:
Bit 3:
Bit 2:
Bit 1, 0:
Advanced IR LB_INFR
Legacy IR
Reset Value
MODE
Set0.Reg5 - IR Status Register (USR)
MIR, FIR Modes:
MIR, FIR modes:
MIR, FIR modes:
MIR, FIR Modes:
LB_INFR - Last Byte In Frame End
Set to 1 when last byte of a frame is in the bottom of FIFO. This bit separates one frame
from another when RX FIFO has more than one frame.
Same as legacy IR description.
MX_LEX - Maximum Frame Length Exceed
Set to 1 when the length of a frame from the receiver has exceeded the programmed
frame length defined in SET4.Reg6 and Reg5. If this bit is set to 1, the receiver will not
receive any data to RX FIFO.
PHY_ERR - Physical Layer Error
Set to 1 when an illegal data symbol is received. The illegal data symbol is defined in
physical layer of IrDA version 1.1. When this bit is set to 1, the decoder of receiver will
be aborted and a frame end signal is set to 1.
CRC_ERR - CRC Error
Set to 1 when an attached CRC is erroneous.
OER - Overrun Error, RDR - RBR Data Ready
Definitions are the same as legacy IR.
RFEI
B7
0
TSRE
TSRE
B6
0
TBRE
TBRE
B5
0
MX_LEX PHY_ERR CRC_ERR
- 65 -
SBD
B4
0
W83L517D/W83L517D-F
NSER
B3
0
Publication Release Date: May 23, 2005
PBER
B2
0
OER
OER
B1
0
Revision 1.0
RDR
RDR
B0
0

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