w83l517g Winbond Electronics Corp America, w83l517g Datasheet - Page 44

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w83l517g

Manufacturer Part Number
w83l517g
Description
Winbond Lpc I/o For Notebook W83l517d/ W83l517d-f
Manufacturer
Winbond Electronics Corp America
Datasheet
DSKCHG (Bit 7):
This bit indicates the status of DSKCHG# input.
Bit 6-4: These bits are always a logic 1 during a read.
DMAEN (Bit 3):
This bit indicates the value of DO REGISTER bit 3.
NOPREC (Bit 2):
This bit indicates the value of CC REGISTER NOPREC bit.
DRATE1 DRATE0 (Bit 1, 0):
These two bits select the data rate of the FDC.
6.2.9
This register is used to control the data rate. In the PC/AT and PS/2 mode, the bit definitions are as
follows:
Bit 7-2: Reserved. These bits should be set to 0.
DRATE1 DRATE0 (Bit 1, 0):
These two bits select the data rate of the FDC.
In the PS/2 Model 30 mode, the bit definitions are as follows:
Configuration Control Register (CC Register) (Write base address + 7)
X: Reserved
x
7
X
X
7
:
7
Reserved
x
6
X
6
6
0
x
5
5
5
X
0
x
X
0
4
4
4
X
3
3
x
- 44 -
3
2
2
x
2
1
1
W83L517D/W83L517D-F
1
0
0
DSKCHG
DRATE0
0
DRATE1
NOPREC
DMAEN
DRATE0
DRATE1
NOPREC
DRATE0
DRATE1

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