w83l517g Winbond Electronics Corp America, w83l517g Datasheet - Page 68

• Manufacturer Part Number: w83l517g
• Description: Winbond Lpc I/o For Notebook W83l517d/ W83l517d-f
• Manufacturer: Winbond Electronics Corp America

8.3.2
These registers are defined the same as Set 0 registers.
8.4
These registers are only used in advanced modes.
8.4.1
These two registers are the same as legacy IR baud rate divisor latch in SET 1.Reg0~1. In advanced
SIR/ASK-IR mode, the user should program these registers to set baud rate. This is to prevent
backward operations from occurring.
8.4.2
Bit 7:
Bit 6:
Bit 5:
Advanced IR BR_OUT
Address Offset Register Name
Reset Value
MODE
Set2 - Interrupt Status or IR FIFO Control Register (ISR/UFR)
Set1.Reg 2~7
Reg0, 1 - Advanced Baud Rate Divisor Latch (ABLL/ABHL)
Reg2 - Advanced IR Control Register 1 (ADCR1)
0
1
2
3
4
5
6
7
BR_OUT - Baud Rate Clock Output
When written to 1, the programmed baud rate clock will be output to DTR pin. This bit is
only used to test baud rate divisor.
Reserved, write 0.
EN_LOUT - Enable Loopback Output
A write to 1 will enable transmitter to output data to IRTX pin when loopback operation
occurs. Internal data can be verified through an output pin by setting this bit.
BIT 7
0
Reserved
RXFDTH
TXFDTH
ADCR1
ADCR2
ABHL
ABLL
SSR
BIT 6
0
-
EN_LOU
Advanced Baud Rate Divisor Latch (Low Byte)
Advanced Baud Rate Divisor Latch (High Byte)
Advanced IR Control Register 1
Sets Select Register
Advanced IR Control Register 2
-
Transmitter FIFO Depth
Receiver FIFO Depth
BIT 5
T
0
- 68 -
ALOOP D_CHSW DMATHL
BIT 4
0
W83L517D/W83L517D-F
Register Description
BIT 3
0
BIT 2
0
DMA_F
BIT 1
0
ADV_SL
BIT 0
0