tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 109

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tmxf28155

Manufacturer Part Number
tmxf28155
Description
Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
Manufacturer
ETC-unknow
Datasheet

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Preliminary Data Sheet
May 2001
8 TMUX Registers
Table 109. TMUX_TLRDI_CTL, Transmit High-Speed Line RDI Control Parameters (R/W)
Table 110. TMUX_TPRDI_CTL, Transmit High-Speed Path RDI Control Parameters (R/W)
Agere Systems Inc.
Address Bit
0x4003B 15:8
Address
0x4003A
7:5
4
3
2
1
0
15:7
Bit
6
5
4
3
2
1
0
TMUX_TRTIM_PRDIINH[3:1] Transmit Receive Trace Identifier Mismatch Path RDI
TMUX_TRUEQ_PRDIINH
TMUX_TRPAIS_PRDIINH
TMUX_TRPLM_PRDIINH
TMUX_TRLOP_PRDIINH
TMUX_TRLAISMON_LRDIINH Transmit Receive Line AIS Line RDI
TMUX_TEPRDI_MODE
TMUX_TRHSOOF_LRDIINH
TMUX_TRHSLOS_LRDIINH
TMUX_TRHSLOF_LRDIINH
TMUX_TRHSSD_LRDIINH
TMUX_TRHSSF_LRDIINH
TMUX_TRILOC_LRDIINH
(continued)
Name
Name
Reserved.
Inhibit. When a 1, causes the associated failure not to
contribute to the automatic insertion of RDI-P; other-
wise, the associated alarm contributes to the generation
of RDI-P.
Transmit Receive Unequipped Path RDI Inhibit.
When a 1, causes the associated failure not to contrib-
ute to the automatic insertion of RDI-P; otherwise, the
associated alarm contributes to the generation of RDI-P.
Transmit Receive Payload Label Mismatch Path RDI
Inhibit. When a 1, causes the associated failure not to
contribute to the automatic insertion of RDI-P; other-
wise, the associated alarm contributes to the generation
of RDI-P.
Transmit Receive Loss-of-Pointer RDI Inhibit. When
a 1, causes the associated failure not to contribute to
the automatic insertion of RDI-P; otherwise, the associ-
ated alarm contributes to the generation of RDI - P.
Transmit Receive Path AIS RDI Inhibit. Same as
above.
Transmit Enhanced RDI Mode. When a 1, causes the
enhanced 3-bit path RDI value to be transmitted in
G1[3:1]; otherwise, a one-bit value (G1[3]) is sent.
Reserved.
Transmit Receive High-speed Signal
Degrade L-RDI Inhibit. Control bit, when
set to a logic 1, causes the associated fail-
ure not to contribute to the automatic inser-
tion of RDI-L; otherwise, the associated
alarm contributes to the generation of RDI-L.
Transmit Receive High-speed Signal Fail
L-RDI Inhibit. Control bit, when set to a
logic 1, causes the associated failure not to
contribute to the automatic insertion of RDI-
L; otherwise, the associated alarm contrib-
utes to the generation of RDI-L.
Inhibit. Same as above.
Transmit Receive High-speed Loss-of-
Frame Line RDI Inhibit. Same as above.
Transmit Receive High-speed Out-of-
Frame Line RDI Inhibit. Same as above.
Transmit Receive High-speed Loss-of-
Signal Line RDI Inhibit. Same as above.
Transmit Receive Input Loss-of-Clock
Line RDI Inhibit. Same as above.
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
Function
Function
TMXF28155/51 Super Mapper
Reset Default
0x000
0
0
0
0
0
0
0
Default
Reset
0x000
0
0
0
0
0
0
109

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