tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 87

• Manufacturer Part Number: tmxf28155
• Description: Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
• Manufacturer: ETC-unknow

Preliminary Data Sheet
May 2001
8 TMUX Registers
Table 83. TMUX_RPOH[1—3]_DLT, Delta/Event (COR/COW) (continued)
Note: In
Table 84. TMUX_TX_MSK, Mask Bits for INT Interrupt Signal (R/W) (Mask = 1, No Mask = 0)
Agere Systems Inc.
Address
Address
0x4000A
0x40009
change in state has taken place.
Table
Bit
15:7
4
3
2
1
0
Bit
6:4
84, the mask bits are set to suppress an interrupt when the corresponding event has occurred or
3
2
1
0
TMUX_RPAISD3
TMUX_RNDFE3
TMUX_RDECE3
TMUX_RLOPD3
TMUX_RINCE3
TMUX_TLSPARM[3:1] Transmit Low-speed Parity Error Mask (Input Port Num-
TMUX_TPOAC_PM
TMUX_TTOAC_PM
TMUX_THSILOFM
TMUX_THSILOCM
Name
(continued)
Name
—
Receive New Data Flag Event. This event bit indicates that the
incoming pointer has the new data flag enabled, causing a jump
in the current pointer location for port 3. Only port 1 information
is valid in AU-4 mode and in STS-1 mode. The mask bit is
TMUX_RNDFM3
Receive Pointer Decrement Event. This event bit indicates
that a valid incoming pointer decrement indication was received
on port 3. Only port 1 information is valid in AU-4 mode and in
STS-1 mode. The mask bit is TMUX_RDECM3
Receive Pointer Increment Event. This event bit indicates that
a valid incoming pointer increment indication was received on
port 3. Only port 1 information is valid in AU-4 mode and in
STS-1 mode. The mask bit is TMUX_RINCM3
Receive Path AIS Delta. This delta bit indicates a change in
state of the TMUX_RPAIS3
nates that the port 3 pointer interpreter is in the alarm indication
signal state. Only port 1 information is valid in AU-4 mode and in
STS-1 mode. The mask bit is TMUX_RPAISM3
Receive Loss of Pointer Delta. This delta bit indicates a
change in state of the TMUX_RLOP3
designates that the port 3 pointer interpreter is in the loss of
pointer state. Only port 1 information is valid in AU-4 mode. The
mask bit is TMUX_RLOPM3
Reserved.
ber). See
Transmit Path Overhead Access Channel (TPOAC) Par-
ity Error Mask. See
Transmit Transport Overhead Access Channel (TTOAC)
Parity Error Mask. See
Transmit High-speed Input Loss of Frame Mask. See
Table 80
Transmit High-speed Input Loss of Clock Mask. See
Table 80
for description.
for description.
Table 80
(Table
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
for description.
87).
Table 80
Function
(Table
(Table
Table 80
Function
92) state bit, which desig-
for description.
87).
TMXF28155/51 Super Mapper
(Table
for description.
92) state bit, which
(Table
(Table
(Table
87).
87).
87).
Default
Default
Reset
Reset
0x000
0
0
0
0
0
1
1
1
1
1
87