tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 213

no-image

tmxf28155

Manufacturer Part Number
tmxf28155
Description
Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
Manufacturer
ETC-unknow
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
tmxf281553BAL3C
Manufacturer:
DSP
Quantity:
5
Preliminary Data Sheet
May 2001
11 M13/M23 MUX/DeMUX Registers
Table 250. M13_DS1_FEAC_LB_DETD_R[1—4], DS1 Far-End Alarm and Control Loopback Detect Delta
Table 251. M13_DS1_FEAC_LB_DET_R[1—4], DS1 Far-End Alarm and Control Loopback Detect Status
Agere Systems Inc.
Address
0x1004D
0x1004D
0x1004D
0x1004E
0x1004D
0x1004E
0x1004C
0x1004C
0x1004F
0x10050
0x1004F
0x10050
Address Bit
0x1004A
0x1004B
0x1004A
0x1004B
0x10049
0x10049
0x10049
0x10049
Registers (RO)
Registers (RO)
15:8
15:8
15:8
15:8
15:8
15:8
15:8
15:8
6:4
3:0
7:0
7:0
7:0
Bit
6:4
3:0
7:0
7:0
7:0
7
7
M13_DS1_FEAC_LB_DET[28:25]
M13_DS1_FEAC_LB_DET[24:17]
M13_DS1_FEAC_LB_DETD[28:25]
M13_DS1_FEAC_LB_DETD[24:17]
M13_DS1_FEAC_LB_DET[16:9]
M13_DS1_FEAC_LB_DETD[16:9]
M13_DS1_FEAC_LB_DET[8:1]
M13_DS1_FEAC_LB_DETD[8:1]
M13_DS3_FLB_DET
M13_DS3_FLB_DETD
Name
Name
(continued)
Reserved.
When an FEAC loopback activate codeword for
DS3 is received four consecutive times, the bit is
set high. The bit is cleared when a loopback deacti-
vate codeword is received four consecutive times.
Reserved.
Reserved.
Reserved.
Reserved.
When an FEAC loopback activate codeword for
DS1 is received four consecutive times, the appro-
priate bit(s) is set high. The bit(s) is cleared when a
loopback deactivate codeword for that channel(s) is
received four consecutive times.
Reserved.
This delta bit is set if M13_DS3_FLB_DET
(Table
grammed to be either clear on read (COR) or
clear on write (COW), and it is not set to 1
again until another state transition occurs.
Reserved.
Reserved.
Reserved.
Reserved.
These individual delta bits are set as the
result of the corresponding state bits
M13_DS1_FEAC_LB_DET[28:1]
transitioning either from 0 to 1 or from 1 to 0.
Delta bits can be programmed to be either
clear on read (COR) or clear on write
(COW), and they are not set to 1 again until
the event reoccurs.
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
251) changes state. It can be pro-
Function
Function
TMXF28155/51 Super Mapper
(Table
251)
Default
Reset
0x00
0x00
0x00
0x00
0x00
0x00
0x00
000
0x0
0x0
Default
Reset
0x00
0x00
0x00
0x00
0x00
0x00
0x00
000
0x0
0
213

Related parts for tmxf28155