tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 72

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tmxf28155

Manufacturer Part Number
tmxf28155
Description
Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
Manufacturer
ETC-unknow
Datasheet

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155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
7 Microprocessor Interface and Global Control and Status Registers
Table 73. SMPR_PMRCLR, PM Reset Count Low Register (RW)
Table 74. SMPR_SR, Scratch Register (RW)
Table 75. SMPR_TX_LINE_EN1
72
Address
0x00017 15:0 SMPR_PMRESET_LOW_COUNT[15:0] Performance Monitor Counter Preset.
Address
Address
0x0001F
0x00018
0x00019
Bit
15:0
15:0
12:0
Bit
Bit
SMPR_TX_LINE_EN[29:17] 3-State Control for LINETXDATA, LINETXCLK,
SMPR_SCRATCH_REGISTER[15:0] Scratch Register. This register is for test
SMPR_TX_LINE_EN[16:1]
Name
Name
Name
3-State Control for LINETXDATA, LINETXCLK,
and LINETXSYNC Output Pins.
and LINETXSYNC Output Pins.
and diagnostics purpose.
Read/write operations can be performed on
all bits. No SMPR control and status will be
affected by any read/write operations to this
register.
The preset value of this register determines
the frequency of the internal PM counter.
User should preload an appropriate value
based on the microprocessor interface
clock rate in order to reach the desired
PMRST rate.
Function
Function
Function
Agere Systems Inc.
(continued)
May 2001
0x0000
0x0000
Default
Default
Default
0x0000
0x0000
Reset
Reset
Reset

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