cl-pd6833 Cirrus Logic, Inc., cl-pd6833 Datasheet - Page 115
cl-pd6833
Manufacturer Part Number
cl-pd6833
Description
Pci-to-cardbus Host Adapter
Manufacturer
Cirrus Logic, Inc.
Datasheet
1.CL-PD6833.pdf
(216 pages)
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CL-PD6833
PCI-to-CardBus Host Adapter
9.2.6
There are five separate Card Memory Map Offset Address High registers, each with identical fields.
These registers are located at the following indexes:
Bits 5:0 — Offset Address 25:20
Bit 6 — REG Setting
Bit 7 — Write Protect
June 1998
Write Protect
Register Name: Card Memory Map 0–4 Offset Address High
I/O Index: 15h, 1Dh, 25h, 2Dh, 35h
Memory Offset: 815h, 81Dh, 825h, 82Dh, 835h
Index (Socket A)
15h
1Dh
25h
2Dh
35h
R/W:0
Bit 7
This field contains the most-significant six bits of the Offset Address. See the description of the
Offset Address field associated with bits 7:0 of the Card Memory Map 0–4 Offset Address Low
register (on
This bit determines whether REG# is active for accesses made through this window. CIS (card
information structure) memory is accessed by setting this bit to ‘1’.
This bit determines whether writes to the card through this window are allowed.
Card Memory Map 0–4 Offset Address High
0
1
0
1
ADVANCE DATA BOOK v0.3
REG Setting
R/W:0
Bit 6
page
REG# is not active for accesses made through this window.
REG# is active for accesses made through this window.
Writes to the card through this window are allowed.
Writes to the card through this window are not allowed.
114).
Register
Card Memory Map 0 Offset Address High
Card Memory Map 1 Offset Address High
Card Memory Map 2 Offset Address High
Card Memory Map 3 Offset Address High
Card Memory Map 4 Offset Address High
Bit 5
Bit 4
Offset Address 25:20
Bit 3
R/W:000000
Bit 2
WINDOW MAPPING REGISTERS
Register Compatibility Type: 365
Bit 1
Register Per: socket
Bit 0
115
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