cl-pd6833 Cirrus Logic, Inc., cl-pd6833 Datasheet - Page 69
cl-pd6833
Manufacturer Part Number
cl-pd6833
Description
Pci-to-cardbus Host Adapter
Manufacturer
Cirrus Logic, Inc.
Datasheet
1.CL-PD6833.pdf
(216 pages)
- Current page: 69 of 216
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CL-PD6833
PCI-to-CardBus Host Adapter
Bit 15— PME Status
Bits 21:16 — Reserved
Bit 22 — B2_B3# (B2/B3 Support for D3
Bit 23 — BPCC_EN (Bus Power / Clock Control Enable)
NOTE: Bits 23:16 always read back ‘0’s to indicate that the data register is not supported.
Bits 31:24 — Data
June 1998
This bit indicates that an event has occurred that, if the PME Enable bit is set, would cause PME
to be signalled. Writing a ‘1’ to this bit clears it to ‘0’, and writing ‘0’ to this bit has no effect.
This bit set to ‘0’ and is not meaningful because bit 23 (BPCC_EN) is set to ‘0’.
This bit is set to ‘0’. A ‘0’ indicates that the bus power/clock control policies have been disabled.
ADVANCE DATA BOOK v0.3
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PCI CONFIGURATION REGISTERS
69
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