cl-pd6833 Cirrus Logic, Inc., cl-pd6833 Datasheet - Page 156

• Manufacturer Part Number: cl-pd6833
• Description: Pci-to-cardbus Host Adapter
• Manufacturer: Cirrus Logic, Inc.

11.8.8
This register indicates the source of a management interrupt generated by the CL-PD6833.
NOTE: The corresponding bit in the Management Interrupt Configuration register must be set to ‘1’ to enable
Bit 0 — Battery Dead Or Status Change
Bit 1 — Battery Warning Change
Bit 2 — Ready Change
156
Register Name: Extension Card Status Change
I/O Index: 2Fh Extended Index: 2Eh
Memory Offset: 92Eh
Bit 7
R:0
each specific status change detection. This register can only be cleared after accessing register 804h, and
writing a ‘1’ to the corresponding bit in register 92Eh.
In Memory Card Interface mode, this bit is set to ‘1’ when the BVD1/STSCHG#/RI# pin (see
page
mode, this bit is set to ‘1’ when the BVD1/STSCHG#/RI# pin changes from either high to low or
low to high. In I/O Card Interface mode, the function of this bit is not affected by bit 7 of the
Interrupt and General Control register. This bit is reset to a ‘0’ if the Card Status register is first
cleared and then a ‘1’ is written to this bit.
In Memory Card Interface mode, this bit is set to ‘1’ when the BVD2/SPKR#/LED# pin changes
from high to low, indicating a battery warning. This bit is not valid in I/O Card Interface mode. This
bit is reset to a ‘0’ if the Card Status register is first cleared and then a ‘1’ is written to this bit.
This bit is ‘1’ when a change has occurred on the RDY/IREQ# pin. This bit is reset to a ‘0’ if the
Card Status register is first cleared and then a ‘1’ is written to this bit.
EXTENSION REGISTERS
Extension Card Status Change
0
1
0
1
0
1
20) changes from high to low, indicating a battery dead condition. In I/O Card Interface
Bit 6
R:0
A transition (from high to low in Memory Card Interface mode or either high to low or low to high in
I/O Card Interface mode) on the BVD1/STSCHG#/RI# pin has not occurred since this register was
last read.
A transition on the BVD1/STSCHG#/RI# pin has occurred.
A transition (from high to low) on the BVD2/SPKR#/LED# pin has not occurred since this register
was last read.
A transition on the BVD2/SPKR#/LED# pin has occurred.
A transition on the RDY/IREQ# pin has not occurred since this register was last read.
A transition on the RDY/IREQ# pin has occurred.
Reserved
Bit 5
R:0
Bit 4
R:0
Card Detect
(Latched)
Change
R/C:0
Bit 3
(Latched)
Change
ADVANCE DATA BOOK v0.3
Ready
R/C:0
Bit 2
PCI-to-CardBus Host Adapter
Register Compatibility Type: ext.
(Latched)
Warning
Change
Battery
R/C:0
Bit 1
Register Per: socket
CL-PD6833
Battery Dead
(Latched)
or Status
Change
June 1998
R/C:0
Bit 0