cl-pd6833 Cirrus Logic, Inc., cl-pd6833 Datasheet - Page 45

• Manufacturer Part Number: cl-pd6833
• Description: Pci-to-cardbus Host Adapter
• Manufacturer: Cirrus Logic, Inc.

CL-PD6833
PCI-to-CardBus Host Adapter
4.
Register Headings
The description of each register starts with a header containing the following information:
a
Special Function Bits
Following is a description of bits with special functions:
Bit Naming Conventions
The following keywords are used within bit and field names:
June 1998
Keyword
Enable
Disable
Mode
Input
Output
Header Field
Register Name
Offset
Register Per
Index
Register
Compatibility Type
Bit Type
0 or 1
Compatibility Bit
PCI/Way
PME_CXT
(PME Context)
Reserved
Scratchpad Bit
Sticky Bit
When the register is socket-specific, the Index value given in the register heading is for Socket A only. For the Socket
B register, add 40h to the index value of the Socket A register to obtain the I/O address. The memory address of any
socket register is an offset from the memory base address of the configuration space for that socket.
a
REGISTER DESCRIPTION CONVENTIONS
ADVANCE DATA BOOK v0.3
Description
Indicates that the function described in the rest of the bit name is active when the bit is ‘1’.
Indicates that the function described in the rest of the bit name is active when the bit is ‘0’.
Indicates that the bit alters the interpretation of the values in other registers.
Indicates a bit or field that is read from a pin.
Indicates a bit or field that is driven to a pin.
Description
This indicates the register name.
This is added to the base address to generate the total effective address.
This indicates whether the register affects both sockets, marked chip , or an individual socket,
marked socket . If socket is indicated, there are two registers being described, each with a
separate index value (one for each socket, A and B).
This is the index value through which an internal register in an indexed register set is
accessed in I/O mode.
This indicates whether the register is 82365SL-compatible, marked 365 ; a register extension,
marked ext .; or DMA-compatible for PCI/Way, marked DMA .
Description
These read-only bits are forced to either ‘0’ or ‘1’ at reset and cannot be changed.
These bits have no function on the CL-PD6833, but are included for compatibility with the
82365SL register set.
These bits provide the programming model for the PCI/Way DMA support.
PME Context is a set of bits that do not get reset or initialized if PME Enable is true when the
CL-PD6833 changes power states from D3 to D0 through a software PCI Bus Segment
reset.
These bits are reserved and should not be changed.
These read/write bits are available for use as bits of memory.
This is a read-only bit and must be cleared by writing a ‘1’ to it.
a
REGISTER DESCRIPTION CONVENTIONS
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