cl-pd6833 Cirrus Logic, Inc., cl-pd6833 Datasheet - Page 133
cl-pd6833
Manufacturer Part Number
cl-pd6833
Description
Pci-to-cardbus Host Adapter
Manufacturer
Cirrus Logic, Inc.
Datasheet
1.CL-PD6833.pdf
(216 pages)
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CL-PD6833
PCI-to-CardBus Host Adapter
Bit 2 — Pulse Management Interrupt
Bit 3 — Pulse System IRQ Interrupt
Bit 4 — Speaker Enable
Bits 6:5 — Scratchpad Bits
Bit 7 — Compatibility Bit
June 1998
This bit is valid only in External Hardware Interrupt Signalling mode. This bit selects Level or Pulse
mode operation of the IRQ[XX] pin. Note that a clock must be present on PCI_CLK for pulsed
interrupts to work. Refer to
This bit is valid only in External Hardware Interrupt Signalling mode. This bit selects Level or Pulse
mode operation of the IRQ[XX] pins.
This bit determines whether the card SPKR# pin drives SPKR_OUT* (see
IRQ[XX]
0
1
0
1
0
1
ADVANCE DATA BOOK v0.3
High-Z = High-impedance
Interrupts are passed to the IRQ[XX] pin as level-sensitive.
When an interrupt occurs, the IRQ[XX] pin is driven with the pulse train shown in
allows for interrupt sharing.
Interrupts are passed to the IRQ[XX] pin as level-sensitive.
When an interrupt occurs, the IRQ[XX] pin is driven with the pulse train shown in
allows for interrupt sharing.
SPKR_OUT* is high-impedance.
SPKR_OUT* is driven from the XNOR of SPKR# from each enabled socket.
High-Z
Figure 11-1. Pulse Mode Interrupts
Section 15.3.2
DRIVEN LOW
for more information on interrupt timing.
DRIVEN HIGH
EXTENSION REGISTERS
page
Figure 11-1
Figure 11-1
21).
High-Z
and
and
133
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