cl-pd6833 Cirrus Logic, Inc., cl-pd6833 Datasheet - Page 197

• Manufacturer Part Number: cl-pd6833
• Description: Pci-to-cardbus Host Adapter
• Manufacturer: Cirrus Logic, Inc.

CL-PD6833
PCI-to-CardBus Host Adapter
Table 15-15. Normal Byte Read/Write Timing
June 1998
1
2
3
Symbol
The Setup time is determined by the value programmed into the Setup Timing register, index 3Ah/3Dh. Using the Timer
Set 0 default value of 00h, the setup time would be 20 ns. S = N
The Command time is determined by the value programmed into the Command Timing register, index 3Bh/3Eh. Using the
Timer Set 0 default value of 07h, the Command time would be 230 ns. C = N
The Recovery time is determined by the value programmed into the Recovery Timing register, index 3Ch/3Fh. Using the
Timer Set 0 default value of 04h, the hold (Recovery) time would be 170 ns. R = N
-IOWR, -IORD,
t
t
t
1
2
3
Read Cycle
Write Cycle
Write Cycle
-OE, -WE
Read or
A[25:0]
D[7:0]
D[15:8]
D[7:0]
-REG,
-CE1
-CE2
Address setup to Command active
Command pulse width
Address hold from Command inactive
ADVANCE DATA BOOK v0.3
x x x x x x
x x x x x x
x x x x x x
NOTE: This is the normal byte read/write timing for all other byte
accesses, including odd I/O cycles where -IOIS16 is low.
Figure 15-9. Normal Byte Read/Write Timing
2
t
1
Parameter
1
Odd/Even Data
3
XX
t
2
val
+ 1, see
Odd/Even Data
page
val
+ 1, see
192.
val
ELECTRICAL SPECIFICATIONS
(C
(R
(S
+ 1, see
page
Tcp) – 10
Tcp) – 10
Tcp) – 10
MIN
page
192.
t
3
192.
MAX
x x x
x x x
x x x
Units
ns
ns
ns
197