MC68HC908JK3 MOTOROLA [Motorola, Inc], MC68HC908JK3 Datasheet - Page 128

• Manufacturer Part Number: MC68HC908JK3
• Description: MC68HC908JK1
• Manufacturer: MOTOROLA [Motorola, Inc]

Timer Interface Module (TIM)
Technical Data
128
NOTE:
NOTE:
TOIE — TIM Overflow Interrupt Enable Bit
TSTOP — TIM Stop Bit
Do not set the TSTOP bit before entering wait mode if the TIM is required
to exit wait mode.
TRST — TIM Reset Bit
Setting the TSTOP and TRST bits simultaneously stops the TIM counter
at a value of $0000.
PS[2:0] — Prescaler Select Bits
overflow occurs before the clearing sequence is complete, then
writing logic zero to TOF has no effect. Therefore, a TOF interrupt
request cannot be lost due to inadvertent clearing of TOF. Reset
clears the TOF bit. Writing a logic one to TOF has no effect.
This read/write bit enables TIM overflow interrupts when the TOF bit
becomes set. Reset clears the TOIE bit.
This read/write bit stops the TIM counter. Counting resumes when
TSTOP is cleared. Reset sets the TSTOP bit, stopping the TIM
counter until software clears the TSTOP bit.
Setting this write-only bit resets the TIM counter and the TIM
prescaler. Setting TRST has no effect on any other registers.
Counting resumes from $0000. TRST is cleared automatically after
the TIM counter is reset and always reads as logic zero. Reset clears
the TRST bit.
These read/write bits select one of the seven prescaler outputs as the
input to the TIM counter as
PS[2:0] bits.
1 = TIM counter has reached modulo value
0 = TIM counter has not reached modulo value
1 = TIM overflow interrupts enabled
0 = TIM overflow interrupts disabled
1 = TIM counter stopped
0 = TIM counter active
1 = Prescaler and TIM counter cleared
0 = No effect
Timer Interface Module (TIM)
Table 10-2
shows. Reset clears the
MC68H(R)C908JL3
MOTOROLA
—
Rev. 1.0