MC68HC908JK3 MOTOROLA [Motorola, Inc], MC68HC908JK3 Datasheet - Page 59

• Manufacturer Part Number: MC68HC908JK3
• Description: MC68HC908JK1
• Manufacturer: MOTOROLA [Motorola, Inc]

6.6.2 Stop Mode
6.7 CPU During Break Interrupts
6.8 Instruction Set Summary
6.9 Opcode Map
MC68H(R)C908JL3
MOTOROLA
—
Rev. 1.0
The STOP instruction:
After exiting stop mode, the CPU clock begins running after the oscillator
stabilization delay.
If a break module is present on the MCU, the CPU starts a break
interrupt by:
The break interrupt begins after completion of the CPU instruction in
progress. If the break address register match occurs on the last cycle of
a CPU instruction, the break interrupt begins immediately.
A return-from-interrupt instruction (RTI) in the break routine ends the
break interrupt and returns the MCU to normal operation if the break
interrupt has been deasserted.
See
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Table
Clears the interrupt mask (I bit) in the condition code register,
enabling external interrupts. After exit from stop mode by external
interrupt, the I bit remains clear. After exit by reset, the I bit is set.
Disables the CPU clock
Loading the instruction register with the SWI instruction
Loading the program counter with $FFFC:$FFFD or with
$FEFC:$FEFD in monitor mode
6-2.
Central Processor Unit (CPU)
Central Processor Unit (CPU)
CPU During Break Interrupts
Technical Data
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