CY7C1412KV18-333BZXI Cypress Semiconductor, CY7C1412KV18-333BZXI Datasheet - Page 4

• Manufacturer Part Number: CY7C1412KV18-333BZXI
• Description: SRAM 36MB (2Mx18) 1.8v 333MHz QDR II SRAM
• Manufacturer: Cypress Semiconductor

Specifications of CY7C1412KV18-333BZXI

• Rohs: yes
• Memory Size: 36 MB
• Organization: 2 M x 18
• Access Time: 30 ns
• Supply Voltage - Max: 1.9 V
• Supply Voltage - Min: 1.7 V
• Maximum Operating Current: 750 mA
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: FBGA-165
• Factory Pack Quantity: 136

Contents
Pin Configurations ........................................................... 5
Pin Definitions .................................................................. 7
Functional Overview ........................................................ 9
Application Example ...................................................... 10
Truth Table ...................................................................... 11
Write Cycle Descriptions ............................................... 11
Write Cycle Descriptions ............................................... 12
Write Cycle Descriptions ............................................... 12
IEEE 1149.1 Serial Boundary Scan (JTAG) .................. 13
TAP Controller State Diagram ....................................... 15
TAP Controller Block Diagram ...................................... 16
TAP Electrical Characteristics ...................................... 16
TAP AC Switching Characteristics ............................... 17
TAP Timing and Test Conditions .................................. 18
Identification Register Definitions ................................ 19
Document Number: 001-57825 Rev. *F
Read Operations ......................................................... 9
Write Operations ......................................................... 9
Byte Write Operations ................................................. 9
Concurrent Transactions ............................................. 9
Depth Expansion ......................................................... 9
Programmable Impedance .......................................... 9
Echo Clocks ................................................................ 9
PLL ............................................................................ 10
Disabling the JTAG Feature ...................................... 13
Test Access Port ....................................................... 13
Performing a TAP Reset ........................................... 13
TAP Registers ........................................................... 13
TAP Instruction Set ................................................... 13
Scan Register Sizes ....................................................... 19
Instruction Codes ........................................................... 19
Boundary Scan Order .................................................... 20
Power Up Sequence in QDR II SRAM ........................... 21
Maximum Ratings ........................................................... 22
Operating Range ............................................................. 22
Neutron Soft Error Immunity ......................................... 22
Electrical Characteristics ............................................... 22
Capacitance .................................................................... 24
Thermal Resistance ........................................................ 24
AC Test Loads and Waveforms ..................................... 24
Switching Characteristics .............................................. 25
Switching Waveforms .................................................... 27
Ordering Information ...................................................... 28
Package Diagram ............................................................ 30
Acronyms ........................................................................ 31
Document Conventions ................................................. 31
Document History Page ................................................. 32
Sales, Solutions, and Legal Information ...................... 33
Power Up Sequence ................................................. 21
PLL Constraints ......................................................... 21
DC Electrical Characteristics ..................................... 22
AC Electrical Characteristics ..................................... 24
Ordering Code Definitions ......................................... 29
Units of Measure ....................................................... 31
Worldwide Sales and Design Support ....................... 33
Products .................................................................... 33
PSoC Solutions ......................................................... 33
CY7C1412KV18, CY7C1414KV18
CY7C1425KV18
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