C8051F005DK Silicon Laboratories Inc, C8051F005DK Datasheet - Page 84
C8051F005DK
Manufacturer Part Number
C8051F005DK
Description
DEV KIT FOR F005/006/007
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheet
1.C8051F005-TB.pdf
(171 pages)
Specifications of C8051F005DK
Contents
Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
Processor To Be Evaluated
C8051F01x
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F005
Silicon Family Name
C8051F00x
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
Silicon Laboratories C8051 F005/006/007
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1188
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F005DK
Manufacturer:
SiliconL
Quantity:
1
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Bit7:
Bit6:
Bit5:
Bit4:
Bit3:
Bit2:
Bit1:
Bit0:
PXVLD
R/W
Bit7
This bit sets the priority of the XTLVLD interrupt.
0: XTLVLD interrupt set to low priority level.
1: XTLVLD interrupt set to high priority level.
This bit sets the priority of the External Interrupt 7.
0: External Interrupt 7 set to low priority level.
1: External Interrupt 7 set to high priority level.
This bit sets the priority of the External Interrupt 6.
0: External Interrupt 6 set to low priority level.
1: External Interrupt 6 set to high priority level.
This bit sets the priority of the External Interrupt 5.
0: External Interrupt 5 set to low priority level.
1: External Interrupt 5 set to high priority level.
This bit sets the priority of the External Interrupt 4.
0: External Interrupt 4 set to low priority level.
1: External Interrupt 4 set to high priority level.
PADC0: ADC End of Conversion Interrupt Priority Control.
This bit sets the priority of the ADC0 End of Conversion Interrupt.
0: ADC0 End of Conversion interrupt set to low priority level.
1: ADC0 End of Conversion interrupt set to high priority level.
This bit sets the priority of the Timer 3 interrupts.
0: Timer 3 interrupt set to low priority level.
1: Timer 3 interrupt set to high priority level.
PXVLD: External Clock Source Valid (XTLVLD) Interrupt Priority Control.
Reserved: Must write 0. Reads 0.
PX7: External Interrupt 7 Priority Control.
PX6: External Interrupt 6 Priority Control.
PX5: External Interrupt 5 Priority Control.
PX4: External Interrupt 4 Priority Control.
PT3: Timer 3 Interrupt Priority Control.
R/W
Bit6
-
Figure 10.14. EIP2: Extended Interrupt Priority 2
R/W
PX7
Bit5
R/W
PX6
Bit4
Rev. 1.7
PX5
R/W
Bit3
PX4
R/W
Bit2
C8051F000/1/2/5/6/7
C8051F010/1/2/5/6/7
PADC0
R/W
Bit1
R/W
PT3
Bit0
SFR Address:
Reset Value
00000000
0xF7
84
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