DF2170BVTE33V Renesas Electronics America, DF2170BVTE33V Datasheet - Page 195

• Manufacturer Part Number: DF2170BVTE33V
• Description: IC H8S/2170 MCU FLASH 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2170BVTE33V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: SCI, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -

Bit
14
13
12
11
10
Bit Name
BEF
DRAKE
TENDE
DREQS
AMS
0
0
0
Initial
Value
0
0
R/W
R/(W)*
R/W
R/W
R/W
R/W
2
0: DRAK pin output disabled
1: DRAK pin output enabled
Address Mode Select
Description
Block Transfer Error Flag
Flag that indicates the occurrence of an error during
block transfer. If an NMI interrupt is generated during
block transfer, the DMAC immediately terminates the
DMA operation and sets this bit to 1. The address
registers indicate the next transfer addresses during
block transfer, but the data for which transfer has been
performed within the block size is lost. To clear this bit,
0 should be written after reading 1 from this bit.
0: No block transfer error
[Clearing condition]
Writing 0 to BEF after reading BEF = 1
1: Block transfer error and block transfer is abnormal.
[Setting condition]
NMI interrupt during block transfer
DRAK Pin Output Enable
Enables output from the DREQ acknowledge/transfer
processing start (DRAK) pin.
TEND Pin Output Enable
Enables output from the DMA transfer end (TEND) pin.
0: TEND pin output disabled
1: TEND pin output enabled
DREQ Select
Specifies low level sensing or falling edge sensing as
the sampling method for the DREQ pin used in external
request mode.
0: Low level sensing (Low level sensing is used for the
1: Falling edge sensing
Selects single address mode or dual address mode.
When single address mode is selected, the DACK pin is
valid.
0: Dual address mode
1: Single address mode
first transfer after transfer is enabled.)
Rev. 2.00, 03/04, page 161 of 534