ATA6613P-PLQW Atmel, ATA6613P-PLQW Datasheet - Page 221

• Manufacturer Part Number: ATA6613P-PLQW
• Description: MCU W/LIN TXRX REG WTCHDG 48-QFN
• Manufacturer: Atmel
• Series: AVR® ATA66 LIN-SBCr

Specifications of ATA6613P-PLQW

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-QFN Exposed Pad
• Processor Series: ATA6x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 23
• Number Of Timers: 3
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6.18.3
9111H–AUTO–01/11
SPI Data Modes and Timing
Table 6-83.
Note:
There are four combinations of XCKn (SCK) phase and polarity with respect to serial data,
which are determined by control bits UCPHAn and UCPOLn. The data transfer timing dia-
grams are shown in
opposite edges of the XCKn signal, ensuring sufficient time for data signals to stabilize. The
UCPOLn and UCPHAn functionality is summarized in
ting of any of these bits will corrupt all ongoing communication for both the Receiver and
Transmitter.
Table 6-84.
Figure 6-76. UCPHAn and UCPOLn Data Transfer Timing Diagrams
Operating Mode
Synchronous Master
mode
UCPOLn
BAUD
f
UBRRn
OSC
0
0
1
1
Data setup (TXD)
Data sample (RXD)
Data setup (TXD)
1. The baud rate is defined to be the transfer rate in bit per second (bps)
XCK
XCK
Data sample (RXD)
Equations for Calculating Baud Rate Register Setting
UCPOLn and UCPHAn Functionality-
UCPHAn
Figure 6-76 on page
Baud rate (in bits per second, bps)
System Oscillator clock frequency
Contents of the UBRRnH and UBRRnL Registers, (0-4095)
0
1
0
1
UCPOL=0
Equation for Calculating Baud
BAUD
SPI Mode
=
0
1
2
3
Rate
-------------------------------------- -
2 UBRRn
(1)
221. Data bits are shifted out and latched in on
f
OSC
Atmel ATA6612/ATA6613
Leading Edge
Sample (Rising)
Setup (Rising)
Sample (Falling)
Setup (Falling)
+
1
Data setup (TXD)
Data sample (RXD)
Data setup (TXD)
Data sample (RXD)
Table
XCK
XCK
Equation for Calculating UBRRn
6-84. Note that changing the set-
UBRRn
Trailing Edge
Setup (Falling)
Sample (Falling)
Setup (Rising)
Sample (Rising)
UCPOL=1
Value
=
------------------- - 1
2BAUD
f
OSC
–
221