ATA6613P-PLQW Atmel, ATA6613P-PLQW Datasheet - Page 256

MCU W/LIN TXRX REG WTCHDG 48-QFN

ATA6613P-PLQW

Manufacturer Part Number
ATA6613P-PLQW
Description
MCU W/LIN TXRX REG WTCHDG 48-QFN
Manufacturer
Atmel
Series
AVR® ATA66 LIN-SBCr
Datasheet

Specifications of ATA6613P-PLQW

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-QFN Exposed Pad
Processor Series
ATA6x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATA6613P-PLQW
Manufacturer:
ATMEL
Quantity:
5 000
Part Number:
ATA6613P-PLQW
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
6.19.8.4
256
Atmel ATA6612/ATA6613
Slave Transmitter Mode
Figure 6-93. Formats and States in the Slave Receiver Mode
In the Slave Transmitter mode, a number of data bytes are transmitted to a Master Receiver
(see
are zero or are masked to zero.
Figure 6-94. Data Transfer in Slave Transmitter Mode
SDA
SCL
Reception of the own
slave address and one or
more data bytes. All are
acknowledged
Last data byte received
is not acknowledged
Arbitration lost as master
and addressed as slave
Reception of the general call
address and one or more data
bytes
Last data byte received is
not acknowledged
Arbitration lost as master and
addressed as slave by general call
Figure
6-94). All the status codes mentioned in this section assume that the prescaler bits
TRANSMITTER
From master to slave
From slave to master
Device 1
SLAVE
S
Device 2
RECEIVER
MASTER
SLA
General Call
W
DATA
Device 3
$60
$68
$70
$78
A
A
A
A
n
A
........
DATA
DATA
Any number of data bytes
and their associated acknowledge bits
This number (contained in TWSR) corresponds
to a defined state of the 2-Wire Serial Bus. The
prescaler bits are zero or masked to zero
Device n
$80
$90
A
A
V
CC
DATA
DATA
R1
$80
$88
$90
$98
A
A
A
A
9111H–AUTO–01/11
P or S
P or S
P or S
P or S
$A0
$A0
R2

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