ATA6613P-PLQW Atmel, ATA6613P-PLQW Datasheet - Page 242

• Manufacturer Part Number: ATA6613P-PLQW
• Description: MCU W/LIN TXRX REG WTCHDG 48-QFN
• Manufacturer: Atmel
• Series: AVR® ATA66 LIN-SBCr

Specifications of ATA6613P-PLQW

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-QFN Exposed Pad
• Processor Series: ATA6x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 23
• Number Of Timers: 3
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6.19.7
Figure 6-87. Interfacing the Application to the TWI in a Typical Transmission
242
Atmel ATA6612/ATA6613
Using the TWI
writes to TWCR to
TWI bus
transmission of
1. Application
START condition sent
Status code indicates
START
initiate
2. TWINT set.
START
The AVR
like reception of a byte or transmission of a START condition. Because the TWI is inter-
rupt-based, the application software is free to carry on other operations during a TWI byte
transfer. Note that the TWI Interrupt Enable (TWIE) bit in TWCR together with the Global Inter-
rupt Enable bit in SREG allow the application to decide whether or not assertion of the TWINT
Flag should generate an interrupt request. If the TWIE bit is cleared, the application must poll
the TWINT Flag in order to detect actions on the TWI bus.
When the TWINT Flag is asserted, the TWI has finished an operation and awaits application
response. In this case, the TWI Status Register (TWSR) contains a value indicating the cur-
rent state of the TWI bus. The application software can then decide how the TWI should
behave in the next TWI bus cycle by manipulating the TWCR and TWDR Registers.
Figure 6-87
this example, a Master wishes to transmit a single data byte to a Slave. This description is
quite abstract, a more detailed explanation follows later in this section. A simple code example
implementing the desired behavior is also presented.
1. The first step in a TWI transmission is to transmit a START condition. This is done by
2. When the START condition has been transmitted, the TWINT Flag in TWCR is set,
TWDR, and loads appropriate control
3. Check TWSR to see if START was
sent. Application loads SLA+W into
signals into TWCR, makin sure that
writing a specific value into TWCR, instructing the TWI hardware to transmit a START
condition. Which value to write is described later on. However, it is important that the
TWINT bit is set in the value written. Writing a one to TWINT clears the flag. The TWI
will not start any operation as long as the TWINT bit in TWCR is set. Immediately
after the application has cleared TWINT, the TWI will initiate transmission of the
START condition.
and TWSR is updated with a status code indicating that the START condition has
successfully been sent.
and TWSTA is written to zero.
TWINT is written to one,
®
TWI is byte-oriented and interrupt based. Interrupts are issued after all bus events,
is a simple example of how the application can interface to the TWI hardware. In
SLA+W
Status code indicates
SLA+W sent, ACK
4. TWINT set.
received
A
Application loads data into TWDR, and
5. Check TWSR to see if SLA+W was
loads appropriate control signals into
TWCR, making sure that TWINT is
sent and ACK received.
written to one
Data
data sent, ACK received
Status code indicates
6. TWINT set.
A
making sure that TWINT is written to one
7. Check TWSR to see if data was sent
Application loads appropriate control
signals to send STOP into TWCR,
STOP
and ACK received.
TWINT set
Indicates
9111H–AUTO–01/11