ATA6613P-PLQW Atmel, ATA6613P-PLQW Datasheet - Page 249
ATA6613P-PLQW
Manufacturer Part Number
ATA6613P-PLQW
Description
MCU W/LIN TXRX REG WTCHDG 48-QFN
Manufacturer
Atmel
Series
AVR® ATA66 LIN-SBCr
Datasheet
1.ATA6612-EK.pdf
(364 pages)
Specifications of ATA6613P-PLQW
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-QFN Exposed Pad
Processor Series
ATA6x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATA6613P-PLQW
Manufacturer:
ATMEL
Quantity:
5 000
Part Number:
ATA6613P-PLQW
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
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6.19.8.2
9111H–AUTO–01/11
Master Receiver Mode
Figure 6-89. Formats and States in the Master Transmitter Mode
In the Master Receiver mode, a number of data bytes are received from a Slave Transmitter
(Slave see
must be transmitted. The format of the following address packet determines whether Master
Transmitter or Master Receiver mode is to be entered. If SLA+W is transmitted, MT mode is
entered, if SLA+R is transmitted, MR mode is entered. All the status codes mentioned in this
section assume that the prescaler bits are zero or are masked to zero.
Successfull
transmission
to a slave
receiver
Next transfer
started with a
repeated start
condition
Not acknowledge
received after the
slave address
Not acknowledge
received after a data
byte
Arbitration lost in slave
address or data byte
Arbitration lost and
addressed as slave
Figure 6-90 on page
From master to slave
From slave to master
$08
S
SLA
W
250). In order to enter a Master mode, a START condition
MT
A or A
DATA
$18
$20
$38
$68
A
A
A
$78
Other master
Other master
continues
continues
n
P
Atmel ATA6612/ATA6613
$B0
DATA
A
Any number of data bytes
and their associated acknowledge bits
This number (contained in TWSR) corresponds
to a defined state of the 2-Wire Serial Bus. The
prescaler bits are zero or masked to zero
A or A
$28
$30
$38
To corresponding
states in slave mode
A
A
Other master
continues
$10
P
R
P
S
SLA
W
R
MR
249
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