S9S12HY64J0MLH Freescale Semiconductor, S9S12HY64J0MLH Datasheet - Page 426

• Manufacturer Part Number: S9S12HY64J0MLH
• Description: MCU 64K FLASH AUTO 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12HY64J0MLH

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
• Peripherals: LCD, Motor control PWM, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-LQFP
• Controller Family/series: S12
• No. Of I/o's: 50
• Ram Memory Size: 4KB
• Cpu Speed: 64MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• Processor Series: S12HY
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: DEMO9S12HY64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Serial Communication Interface (S12SCIV5)
12.3.2.1
Read: Anytime, if AMAP = 0. If only SCIBDH is written to, a read will not return the correct data until
SCIBDL is written to as well, following a write to SCIBDH.
Write: Anytime, if AMAP = 0.
The SCI baud rate register is used by to determine the baud rate of the SCI, and to control the infrared
modulation/demodulation submodule.
426
Module Base + 0x0000
Module Base + 0x0001
SBR[12:0]
TNP[1:0]
Reset
Reset
Field
IREN
6:5
4:0
7:0
7
W
W
R
R
SBR7
IREN
Infrared Enable Bit — This bit enables/disables the infrared modulation/demodulation submodule.
0 IR disabled
1 IR enabled
Transmitter Narrow Pulse Bits — These bits enable whether the SCI transmits a 1/16, 3/16, 1/32 or 1/4 narrow
pulse. See
SCI Baud Rate Bits — The baud rate for the SCI is determined by the bits in this register. The baud rate is
calculated two different ways depending on the state of the IREN bit.
The formulas for calculating the baud rate are:
Note: The baud rate generator is disabled after reset and not started until the TE bit or the RE bit is set for the
Note: Writing to SCIBDH has no effect without writing to SCIBDL, because writing to SCIBDH puts the data in
SCI Baud Rate Registers (SCIBDH, SCIBDL)
0
0
7
7
When IREN = 0 then,
When IREN = 1 then,
Those two registers are only visible in the memory map if AMAP = 0 (reset
condition).
SCI baud rate = SCI bus clock / (16 x SBR[12:0])
SCI baud rate = SCI bus clock / (32 x SBR[12:1])
first time. The baud rate generator is disabled when (SBR[12:0] = 0 and IREN = 0) or (SBR[12:1] = 0 and
IREN = 1).
a temporary location until SCIBDL is written to.
Table
TNP1
SBR6
0
0
6
6
12-3.
Table 12-2. SCIBDH and SCIBDL Field Descriptions
Figure 12-3. SCI Baud Rate Register (SCIBDH)
Figure 12-4. SCI Baud Rate Register (SCIBDL)
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
TNP0
SBR5
0
0
5
5
SBR12
SBR4
NOTE
0
0
4
4
Description
SBR11
SBR3
0
0
3
3
SBR10
SBR2
0
1
2
2
Freescale Semiconductor
SBR9
SBR1
0
0
1
1
SBR8
SBR0
0
0
0
0