S9S12HY64J0MLH Freescale Semiconductor, S9S12HY64J0MLH Datasheet - Page 771

• Manufacturer Part Number: S9S12HY64J0MLH
• Description: MCU 64K FLASH AUTO 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12HY64J0MLH

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
• Peripherals: LCD, Motor control PWM, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-LQFP
• Controller Family/series: S12
• No. Of I/o's: 50
• Ram Memory Size: 4KB
• Cpu Speed: 64MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• Processor Series: S12HY
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: DEMO9S12HY64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

0x00A0–0x00C7 Pulse-Width Modulator 8 channels(PWM) Map
Freescale Semiconductor
Address
Address
0x0090 -
0x008C
0x008A
0x008E
0x009F
0x00A0
0x00A1
0x00A2
0x00A3
0x00A4
0x00A5
0x00A6
0x00A7
0x00A8
0x00A9
0x0082
0x0086
0x0088
0x084
PWMPRCLK
PWMPRSC
PWMSCLA
PWMSCLB
Unimple-
PWMPOL
PWMCLK
PWMCAE
ATDDR1
ATDDR2
ATDDR3
ATDDR4
ATDDR5
ATDDR6
ATDDR7
PWMCTL
PWMTST
Test Only
mented
Name
PWME
Name
W
W
W
W
W
W
W
W
R
R
R
R
R
R
R
R
W
W
W
W
W
W
W
W
W
W
R
R
R
R
R
R
R
R
R
R
PWME7
PPOL7
CON67
PCLK7
CAE7
Bit 7
Bit 7
Bit 7
Bit 7
0
0
0
0
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
PWME6
PPOL6
PCKB2
CON45
PCLK6
CAE6
Bit 6
0
6
0
0
and
and
and
and
and
and
and
6
6
See
See
See
See
See
See
See
Section 8.3.2.12.2, “Right Justified Result Data (DJM=1)”
Section 8.3.2.12.2, “Right Justified Result Data (DJM=1)”
Section 8.3.2.12.2, “Right Justified Result Data (DJM=1)”
Section 8.3.2.12.2, “Right Justified Result Data (DJM=1)”
Section 8.3.2.12.2, “Right Justified Result Data (DJM=1)”
Section 8.3.2.12.2, “Right Justified Result Data (DJM=1)”
Section 8.3.2.12.2, “Right Justified Result Data (DJM=1)”
Section 8.3.2.12.1, “Left Justified Result Data (DJM=0)”
Section 8.3.2.12.1, “Left Justified Result Data (DJM=0)”
Section 8.3.2.12.1, “Left Justified Result Data (DJM=0)”
Section 8.3.2.12.1, “Left Justified Result Data (DJM=0)”
Section 8.3.2.12.1, “Left Justified Result Data (DJM=0)”
Section 8.3.2.12.1, “Left Justified Result Data (DJM=0)”
Section 8.3.2.12.1, “Left Justified Result Data (DJM=0)”
PWME5
CON23
PPOL5
PCKB1
PCLK5
CAE5
Bit 5
5
0
0
0
5
5
PWME4
CON01
PPOL4
PCKB0
PCLK4
CAE4
Bit 4
0
4
0
0
4
4
PWME3
PPOL3
PCLK3
PSWAI
CAE3
0
Bit 3
3
0
0
0
3
3
PWME2
PCKA2
PPOL2
PCLK2
CAE2
PFRZ
Bit 2
0
2
0
0
2
2
Detailed Register Address Map
PWME1
PCKA1
PPOL1
PCLK1
CAE1
Bit 1
0
1
0
0
0
1
1
PWME0
PCKA0
PPOL0
PCLK0
CAE0
Bit 0
Bit 0
Bit 0
Bit 0
0
0
0
0
771